OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	599 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 MC68328.h	37.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 MC68EZ328.h	37.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 MC68VZ328.h	41.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 a.out-core.h	1.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 adb_iop.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 amigahw.h	10.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 amigaints.h	3.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 amigayle.h	3.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 amipcmcia.h	2.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 apollohw.h	2.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	211 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atafd.h	300 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atafdreg.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atari_joystick.h	457 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atari_stdma.h	514 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atari_stram.h	528 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atarihw.h	20.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atariints.h	5.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atarikb.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	4.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	12.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 blinken.h	641 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bootinfo.h	783 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bootstd.h	4.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	659 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 bugs.h	369 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bvme6000hw.h	3.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	296 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	133 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush_mm.h	6.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush_no.h	2.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	3.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	3.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 coldfire.h	1.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 contregs.h	3.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 current.h	580 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	3.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	858 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	291 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	16.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dsp56k.h	1.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dvma.h	9.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry.h	5.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 export.h	74 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	921 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fbio.h	9.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 flat.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	5.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu.h	535 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	12 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 gpio.h	2.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	594 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hash.h	2.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hp300hw.h	186 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwtest.h	467 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 idprom.h	725 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intersil.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	383 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_mm.h	16.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_no.h	5.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	2.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	1.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	732 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	1.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m5206sim.h	6.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m520xsim.h	7.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m523xsim.h	7.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m525xsim.h	10.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m5272sim.h	6.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m527xsim.h	13.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m528xsim.h	9.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m52xxacr.h	3.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m5307sim.h	7.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m53xxacr.h	3.6 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 m53xxsim.h	53.97 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m5407sim.h	6.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m5441xsim.h	8.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m54xxacr.h	4.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m54xxgpt.h	3.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m54xxpci.h	6.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m54xxsim.h	3.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mac_asc.h	520 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mac_baboon.h	999 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mac_iop.h	5.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mac_oss.h	1.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mac_psc.h	7.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mac_via.h	11.44 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 machdep.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machines.h	3.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machw.h	588 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 macintosh.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 macints.h	3.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 math-emu.h	6.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc.h	598 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcf8390.h	3.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcf_pgalloc.h	2.37 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mcf_pgtable.h	9.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfclk.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfdma.h	6.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfgpio.h	8.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfintc.h	3.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfmmu.h	3.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfpit.h	2.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfqspi.h	1.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfsim.h	1.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfslt.h	1.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcftimer.h	2.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfuart.h	6.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcfwdebug.h	4.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	243 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	7.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	264 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	847 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 motorola_pgalloc.h	2.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 motorola_pgtable.h	9.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 movs.h	1.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mvme147hw.h	2.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mvme16xhw.h	2.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 natfeat.h	533 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 nettel.h	2.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 nubus.h	1.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 openprom.h	7.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 oplib.h	9.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	1.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_mm.h	4.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_no.h	1.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_offset.h	256 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	837 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	458 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	444 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	127 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable_mm.h	4.84 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable_no.h	1.57 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 processor.h	3.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	643 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 q40_master.h	2.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 q40ints.h	749 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 quicc_simple.h	1.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 raw_io.h	11.41 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 segment.h	1.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	1.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	9.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	32 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3-head.h	353 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3_pgalloc.h	2.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3_pgtable.h	7.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3ints.h	989 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3mmu.h	4.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3x.h	868 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3xflop.h	5.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun3xprom.h	1.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	974 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	486 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	5.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	8.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	152 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess_mm.h	10.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess_no.h	3.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucontext.h	570 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	600 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	952 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	3.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	651 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 virtconvert.h	947 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 zorro.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: mcfgpio.h

/*
 * Coldfire generic GPIO support.
 *
 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef mcfgpio_h
#define mcfgpio_h

#ifdef CONFIG_GPIOLIB
#include <asm-generic/gpio.h>
#else

int __mcfgpio_get_value(unsigned gpio);
void __mcfgpio_set_value(unsigned gpio, int value);
int __mcfgpio_direction_input(unsigned gpio);
int __mcfgpio_direction_output(unsigned gpio, int value);
int __mcfgpio_request(unsigned gpio);
void __mcfgpio_free(unsigned gpio);

/* our alternate 'gpiolib' functions */
static inline int __gpio_get_value(unsigned gpio)
{
	if (gpio < MCFGPIO_PIN_MAX)
		return __mcfgpio_get_value(gpio);
	else
		return -EINVAL;
}

static inline void __gpio_set_value(unsigned gpio, int value)
{
	if (gpio < MCFGPIO_PIN_MAX)
		__mcfgpio_set_value(gpio, value);
}

static inline int __gpio_cansleep(unsigned gpio)
{
	if (gpio < MCFGPIO_PIN_MAX)
		return 0;
	else
		return -EINVAL;
}

static inline int __gpio_to_irq(unsigned gpio)
{
	return -EINVAL;
}

static inline int gpio_direction_input(unsigned gpio)
{
	if (gpio < MCFGPIO_PIN_MAX)
		return __mcfgpio_direction_input(gpio);
	else
		return -EINVAL;
}

static inline int gpio_direction_output(unsigned gpio, int value)
{
	if (gpio < MCFGPIO_PIN_MAX)
		return __mcfgpio_direction_output(gpio, value);
	else
		return -EINVAL;
}

static inline int gpio_request(unsigned gpio, const char *label)
{
	if (gpio < MCFGPIO_PIN_MAX)
		return __mcfgpio_request(gpio);
	else
		return -EINVAL;
}

static inline void gpio_free(unsigned gpio)
{
	if (gpio < MCFGPIO_PIN_MAX)
		__mcfgpio_free(gpio);
}

#endif /* CONFIG_GPIOLIB */

/*
 * The Freescale Coldfire family is quite varied in how they implement GPIO.
 * Some parts have 8 bit ports, some have 16bit and some have 32bit; some have
 * only one port, others have multiple ports; some have a single data latch
 * for both input and output, others have a separate pin data register to read
 * input; some require a read-modify-write access to change an output, others
 * have set and clear registers for some of the outputs; Some have all the
 * GPIOs in a single control area, others have some GPIOs implemented in
 * different modules.
 *
 * This implementation attempts accommodate the differences while presenting
 * a generic interface that will optimize to as few instructions as possible.
 */
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
    defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
    defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
    defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \
    defined(CONFIG_M5441x)

/* These parts have GPIO organized by 8 bit ports */

#define MCFGPIO_PORTTYPE		u8
#define MCFGPIO_PORTSIZE		8
#define mcfgpio_read(port)		__raw_readb(port)
#define mcfgpio_write(data, port)	__raw_writeb(data, port)

#elif defined(CONFIG_M5307) || defined(CONFIG_M5407) || defined(CONFIG_M5272)

/* These parts have GPIO organized by 16 bit ports */

#define MCFGPIO_PORTTYPE		u16
#define MCFGPIO_PORTSIZE		16
#define mcfgpio_read(port)		__raw_readw(port)
#define mcfgpio_write(data, port)	__raw_writew(data, port)

#elif defined(CONFIG_M5249) || defined(CONFIG_M525x)

/* These parts have GPIO organized by 32 bit ports */

#define MCFGPIO_PORTTYPE		u32
#define MCFGPIO_PORTSIZE		32
#define mcfgpio_read(port)		__raw_readl(port)
#define mcfgpio_write(data, port)	__raw_writel(data, port)

#endif

#define mcfgpio_bit(gpio)		(1 << ((gpio) %  MCFGPIO_PORTSIZE))
#define mcfgpio_port(gpio)		((gpio) / MCFGPIO_PORTSIZE)

#if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
    defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
    defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \
    defined(CONFIG_M5441x)
/*
 * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses
 * read-modify-write to change an output and a GPIO module which has separate
 * set/clr registers to directly change outputs with a single write access.
 */
#if defined(CONFIG_M528x)
/*
 * The 528x also has GPIOs in other modules (GPT, QADC) which use
 * read-modify-write as well as those controlled by the EPORT and GPIO modules.
 */
#define MCFGPIO_SCR_START		40
#elif defined(CONFIGM5441x)
/* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */
#define MCFGPIO_SCR_START		0
#else
#define MCFGPIO_SCR_START		8
#endif

#define MCFGPIO_SETR_PORT(gpio)		(MCFGPIO_SETR + \
					mcfgpio_port(gpio - MCFGPIO_SCR_START))

#define MCFGPIO_CLRR_PORT(gpio)		(MCFGPIO_CLRR + \
					mcfgpio_port(gpio - MCFGPIO_SCR_START))
#else

#define MCFGPIO_SCR_START		MCFGPIO_PIN_MAX
/* with MCFGPIO_SCR == MCFGPIO_PIN_MAX, these will be optimized away */
#define MCFGPIO_SETR_PORT(gpio)		0
#define MCFGPIO_CLRR_PORT(gpio)		0

#endif
/*
 * Coldfire specific helper functions
 */

/* return the port pin data register for a gpio */
static inline u32 __mcfgpio_ppdr(unsigned gpio)
{
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
    defined(CONFIG_M5307) || defined(CONFIG_M5407)
	return MCFSIM_PADAT;
#elif defined(CONFIG_M5272)
	if (gpio < 16)
		return MCFSIM_PADAT;
	else if (gpio < 32)
		return MCFSIM_PBDAT;
	else
		return MCFSIM_PCDAT;
#elif defined(CONFIG_M5249) || defined(CONFIG_M525x)
	if (gpio < 32)
		return MCFSIM2_GPIOREAD;
	else
		return MCFSIM2_GPIO1READ;
#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
      defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
      defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \
      defined(CONFIG_M5441x)
#if !defined(CONFIG_M5441x)
	if (gpio < 8)
		return MCFEPORT_EPPDR;
#if defined(CONFIG_M528x)
	else if (gpio < 16)
		return MCFGPTA_GPTPORT;
	else if (gpio < 24)
		return MCFGPTB_GPTPORT;
	else if (gpio < 32)
		return MCFQADC_PORTQA;
	else if (gpio < 40)
		return MCFQADC_PORTQB;
#endif /* defined(CONFIG_M528x) */
	else
#endif /* !defined(CONFIG_M5441x) */
		return MCFGPIO_PPDR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
#else
	return 0;
#endif
}

/* return the port output data register for a gpio */
static inline u32 __mcfgpio_podr(unsigned gpio)
{
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
    defined(CONFIG_M5307) || defined(CONFIG_M5407)
	return MCFSIM_PADAT;
#elif defined(CONFIG_M5272)
	if (gpio < 16)
		return MCFSIM_PADAT;
	else if (gpio < 32)
		return MCFSIM_PBDAT;
	else
		return MCFSIM_PCDAT;
#elif defined(CONFIG_M5249) || defined(CONFIG_M525x)
	if (gpio < 32)
		return MCFSIM2_GPIOWRITE;
	else
		return MCFSIM2_GPIO1WRITE;
#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
      defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
      defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \
      defined(CONFIG_M5441x)
#if !defined(CONFIG_M5441x)
	if (gpio < 8)
		return MCFEPORT_EPDR;
#if defined(CONFIG_M528x)
	else if (gpio < 16)
		return MCFGPTA_GPTPORT;
	else if (gpio < 24)
		return MCFGPTB_GPTPORT;
	else if (gpio < 32)
		return MCFQADC_PORTQA;
	else if (gpio < 40)
		return MCFQADC_PORTQB;
#endif /* defined(CONFIG_M528x) */
	else
#endif /* !defined(CONFIG_M5441x) */
		return MCFGPIO_PODR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
#else
	return 0;
#endif
}

/* return the port direction data register for a gpio */
static inline u32 __mcfgpio_pddr(unsigned gpio)
{
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
    defined(CONFIG_M5307) || defined(CONFIG_M5407)
	return MCFSIM_PADDR;
#elif defined(CONFIG_M5272)
	if (gpio < 16)
		return MCFSIM_PADDR;
	else if (gpio < 32)
		return MCFSIM_PBDDR;
	else
		return MCFSIM_PCDDR;
#elif defined(CONFIG_M5249) || defined(CONFIG_M525x)
	if (gpio < 32)
		return MCFSIM2_GPIOENABLE;
	else
		return MCFSIM2_GPIO1ENABLE;
#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
      defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
      defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \
      defined(CONFIG_M5441x)
#if !defined(CONFIG_M5441x)
	if (gpio < 8)
		return MCFEPORT_EPDDR;
#if defined(CONFIG_M528x)
	else if (gpio < 16)
		return MCFGPTA_GPTDDR;
	else if (gpio < 24)
		return MCFGPTB_GPTDDR;
	else if (gpio < 32)
		return MCFQADC_DDRQA;
	else if (gpio < 40)
		return MCFQADC_DDRQB;
#endif /* defined(CONFIG_M528x) */
	else
#endif /* !defined(CONFIG_M5441x) */
		return MCFGPIO_PDDR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
#else
	return 0;
#endif
}

#endif /* mcfgpio_h */