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05/09/2024 07:14:12 AM
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Kbuild
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acenv.h
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acpi.h
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alternative.h
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arch_gicv3.h
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arm-cci.h
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asm-bug.h
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asm-offsets.h
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asm-uaccess.h
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assembler.h
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atomic.h
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atomic_ll_sc.h
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barrier.h
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bitops.h
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bitrev.h
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boot.h
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cache.h
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cacheflush.h
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checksum.h
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clocksource.h
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cmpxchg.h
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compat.h
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compiler.h
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cpu.h
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cpu_ops.h
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cpucaps.h
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cpufeature.h
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cpuidle.h
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cputype.h
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current.h
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dcc.h
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device.h
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dma-mapping.h
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dmi.h
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elf.h
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esr.h
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exception.h
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exec.h
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extable.h
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fb.h
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fpsimdmacros.h
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ftrace.h
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futex.h
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hardirq.h
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hw_breakpoint.h
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hwcap.h
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hypervisor.h
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insn.h
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io.h
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irq.h
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irq_work.h
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irqflags.h
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jump_label.h
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kasan.h
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kernel-pgtable.h
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kexec.h
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kgdb.h
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kprobes.h
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kvm_arm.h
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kvm_asm.h
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kvm_coproc.h
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kvm_emulate.h
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kvm_host.h
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kvm_hyp.h
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kvm_mmio.h
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kvm_mmu.h
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linkage.h
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lse.h
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memblock.h
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memory.h
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mmu.h
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mmu_context.h
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mmzone.h
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module.h
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neon.h
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numa.h
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page-def.h
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page.h
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paravirt.h
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pci.h
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percpu.h
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perf_event.h
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pgalloc.h
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pgtable-hwdef.h
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pgtable-prot.h
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pgtable-types.h
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pgtable.h
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probes.h
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proc-fns.h
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processor.h
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ptdump.h
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ptrace.h
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sdei.h
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seccomp.h
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sections.h
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shmparam.h
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signal32.h
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simd.h
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smp.h
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smp_plat.h
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sparsemem.h
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spinlock.h
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spinlock_types.h
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stack_pointer.h
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stackprotector.h
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stacktrace.h
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stage2_pgtable-nopmd.h
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stage2_pgtable-nopud.h
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stage2_pgtable.h
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stat.h
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string.h
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suspend.h
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sync_bitops.h
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syscall.h
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sysreg.h
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system_misc.h
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thread_info.h
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timex.h
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tlb.h
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tlbflush.h
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topology.h
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traps.h
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uaccess.h
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unistd.h
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unistd32.h
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uprobes.h
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vdso.h
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vdso_datapage.h
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vectors.h
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virt.h
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vmap_stack.h
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word-at-a-time.h
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xen
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05/09/2024 07:14:16 AM
rwxr-xr-x
Editing: module.h
Close
/* * Copyright (C) 2012 ARM Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ASM_MODULE_H #define __ASM_MODULE_H #include <asm-generic/module.h> #define MODULE_ARCH_VERMAGIC "aarch64" #ifdef CONFIG_ARM64_MODULE_PLTS struct mod_plt_sec { struct elf64_shdr *plt; int plt_num_entries; int plt_max_entries; }; struct mod_arch_specific { struct mod_plt_sec core; struct mod_plt_sec init; /* for CONFIG_DYNAMIC_FTRACE */ struct plt_entry *ftrace_trampoline; }; #endif u64 module_emit_plt_entry(struct module *mod, void *loc, const Elf64_Rela *rela, Elf64_Sym *sym); u64 module_emit_veneer_for_adrp(struct module *mod, void *loc, u64 val); #ifdef CONFIG_RANDOMIZE_BASE extern u64 module_alloc_base; #else #define module_alloc_base ((u64)_etext - MODULES_VSIZE) #endif struct plt_entry { /* * A program that conforms to the AArch64 Procedure Call Standard * (AAPCS64) must assume that a veneer that alters IP0 (x16) and/or * IP1 (x17) may be inserted at any branch instruction that is * exposed to a relocation that supports long branches. Since that * is exactly what we are dealing with here, we are free to use x16 * as a scratch register in the PLT veneers. */ __le32 mov0; /* movn x16, #0x.... */ __le32 mov1; /* movk x16, #0x...., lsl #16 */ __le32 mov2; /* movk x16, #0x...., lsl #32 */ __le32 br; /* br x16 */ }; static inline struct plt_entry get_plt_entry(u64 val) { /* * MOVK/MOVN/MOVZ opcode: * +--------+------------+--------+-----------+-------------+---------+ * | sf[31] | opc[30:29] | 100101 | hw[22:21] | imm16[20:5] | Rd[4:0] | * +--------+------------+--------+-----------+-------------+---------+ * * Rd := 0x10 (x16) * hw := 0b00 (no shift), 0b01 (lsl #16), 0b10 (lsl #32) * opc := 0b11 (MOVK), 0b00 (MOVN), 0b10 (MOVZ) * sf := 1 (64-bit variant) */ return (struct plt_entry){ cpu_to_le32(0x92800010 | (((~val ) & 0xffff)) << 5), cpu_to_le32(0xf2a00010 | ((( val >> 16) & 0xffff)) << 5), cpu_to_le32(0xf2c00010 | ((( val >> 32) & 0xffff)) << 5), cpu_to_le32(0xd61f0200) }; } static inline bool plt_entries_equal(const struct plt_entry *a, const struct plt_entry *b) { return a->mov0 == b->mov0 && a->mov1 == b->mov1 && a->mov2 == b->mov2; } #endif /* __ASM_MODULE_H */