OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:12 AM	rwxr-xr-x
📄 Kbuild	703 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acenv.h	541 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acpi.h	4.34 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 alternative.h	7.63 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 arch_gicv3.h	3.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_timer.h	4.87 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 arm-cci.h	794 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-bug.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-uaccess.h	2.09 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 assembler.h	13.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic.h	8.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic_ll_sc.h	10.61 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic_lse.h	14.82 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 barrier.h	3.78 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bitops.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitrev.h	452 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 boot.h	384 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 brk-imm.h	706 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	2.23 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cacheflush.h	4.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	1.35 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 clocksource.h	192 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	7.98 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 compat.h	7.15 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 compiler.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu.h	1.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpu_ops.h	2.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpucaps.h	1.87 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpufeature.h	19.14 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpuidle.h	401 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cputype.h	8.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 current.h	517 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 daifflags.h	1.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dcc.h	1.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 debug-monitors.h	3.76 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 device.h	886 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmi.h	850 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 efi.h	4.57 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 elf.h	5.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 esr.h	9.02 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 exception.h	1.21 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 exec.h	868 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	815 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	1000 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	2.91 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 fpsimd.h	4.21 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 fpsimdmacros.h	5.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	1.92 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 futex.h	3.41 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 hardirq.h	2.08 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 hugetlb.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	4.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwcap.h	1.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hypervisor.h	144 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 insn.h	16.03 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 io.h	7.72 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 irq.h	307 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_work.h	228 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	2.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	1.68 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kasan.h	1.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kernel-pgtable.h	4.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	3.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	1.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_arm.h	8.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_asm.h	4.26 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_coproc.h	2.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_emulate.h	10.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_host.h	15.73 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_hyp.h	5.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_mmio.h	1.3 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_mmu.h	11.72 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 linkage.h	114 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 lse.h	1.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 memblock.h	720 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 memory.h	9.16 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu.h	2.76 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu_context.h	6.35 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmzone.h	266 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	2.8 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 neon.h	815 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 numa.h	1.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 page-def.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	1.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 paravirt.h	458 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	878 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	7.48 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 perf_event.h	3.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	3.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-hwdef.h	9.4 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-prot.h	4.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-types.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	21.55 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 probes.h	1022 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 proc-fns.h	1.21 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 processor.h	6.52 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 ptdump.h	1.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	9 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 sdei.h	1.46 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 seccomp.h	714 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	1.46 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 shmparam.h	965 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal32.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 simd.h	1.39 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 smp.h	4.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_plat.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	3.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 spinlock_types.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stack_pointer.h	247 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	2.53 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 stage2_pgtable-nopmd.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stage2_pgtable-nopud.h	1.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stage2_pgtable.h	4.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stat.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	2.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 suspend.h	1.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sync_bitops.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sysreg.h	25.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 system_misc.h	1.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.93 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 timex.h	883 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	2.22 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlbflush.h	5.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 topology.h	1.29 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 traps.h	3.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 uaccess.h	12.01 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unistd.h	1.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd32.h	27.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	777 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vdso.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vdso_datapage.h	1.53 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vectors.h	1.75 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 virt.h	3 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vmap_stack.h	769 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 word-at-a-time.h	2.22 KB	06/16/2023 05:32:39 PM	rw-r--r--
📁 xen	-	05/09/2024 07:14:16 AM	rwxr-xr-x

Editing: kvm_mmu.h

/*
 * Copyright (C) 2012,2013 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __ARM64_KVM_MMU_H__
#define __ARM64_KVM_MMU_H__

#include <asm/page.h>
#include <asm/memory.h>
#include <asm/cpufeature.h>

/*
 * As ARMv8.0 only has the TTBR0_EL2 register, we cannot express
 * "negative" addresses. This makes it impossible to directly share
 * mappings with the kernel.
 *
 * Instead, give the HYP mode its own VA region at a fixed offset from
 * the kernel by just masking the top bits (which are all ones for a
 * kernel address). We need to find out how many bits to mask.
 *
 * We want to build a set of page tables that cover both parts of the
 * idmap (the trampoline page used to initialize EL2), and our normal
 * runtime VA space, at the same time.
 *
 * Given that the kernel uses VA_BITS for its entire address space,
 * and that half of that space (VA_BITS - 1) is used for the linear
 * mapping, we can also limit the EL2 space to (VA_BITS - 1).
 *
 * The main question is "Within the VA_BITS space, does EL2 use the
 * top or the bottom half of that space to shadow the kernel's linear
 * mapping?". As we need to idmap the trampoline page, this is
 * determined by the range in which this page lives.
 *
 * If the page is in the bottom half, we have to use the top half. If
 * the page is in the top half, we have to use the bottom half:
 *
 * T = __pa_symbol(__hyp_idmap_text_start)
 * if (T & BIT(VA_BITS - 1))
 *	HYP_VA_MIN = 0  //idmap in upper half
 * else
 *	HYP_VA_MIN = 1 << (VA_BITS - 1)
 * HYP_VA_MAX = HYP_VA_MIN + (1 << (VA_BITS - 1)) - 1
 *
 * This of course assumes that the trampoline page exists within the
 * VA_BITS range. If it doesn't, then it means we're in the odd case
 * where the kernel idmap (as well as HYP) uses more levels than the
 * kernel runtime page tables (as seen when the kernel is configured
 * for 4k pages, 39bits VA, and yet memory lives just above that
 * limit, forcing the idmap to use 4 levels of page tables while the
 * kernel itself only uses 3). In this particular case, it doesn't
 * matter which side of VA_BITS we use, as we're guaranteed not to
 * conflict with anything.
 *
 * When using VHE, there are no separate hyp mappings and all KVM
 * functionality is already mapped as part of the main kernel
 * mappings, and none of this applies in that case.
 */

#define HYP_PAGE_OFFSET_HIGH_MASK	((UL(1) << VA_BITS) - 1)
#define HYP_PAGE_OFFSET_LOW_MASK	((UL(1) << (VA_BITS - 1)) - 1)

#ifdef __ASSEMBLY__

#include <asm/alternative.h>
#include <asm/cpufeature.h>

/*
 * Convert a kernel VA into a HYP VA.
 * reg: VA to be converted.
 *
 * This generates the following sequences:
 * - High mask:
 *		and x0, x0, #HYP_PAGE_OFFSET_HIGH_MASK
 *		nop
 * - Low mask:
 *		and x0, x0, #HYP_PAGE_OFFSET_HIGH_MASK
 *		and x0, x0, #HYP_PAGE_OFFSET_LOW_MASK
 * - VHE:
 *		nop
 *		nop
 *
 * The "low mask" version works because the mask is a strict subset of
 * the "high mask", hence performing the first mask for nothing.
 * Should be completely invisible on any viable CPU.
 */
.macro kern_hyp_va	reg
alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
	and     \reg, \reg, #HYP_PAGE_OFFSET_HIGH_MASK
alternative_else_nop_endif
alternative_if ARM64_HYP_OFFSET_LOW
	and     \reg, \reg, #HYP_PAGE_OFFSET_LOW_MASK
alternative_else_nop_endif
.endm

#else

#include <asm/pgalloc.h>
#include <asm/cache.h>
#include <asm/cacheflush.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>

static inline unsigned long __kern_hyp_va(unsigned long v)
{
	asm volatile(ALTERNATIVE("and %0, %0, %1",
				 "nop",
				 ARM64_HAS_VIRT_HOST_EXTN)
		     : "+r" (v)
		     : "i" (HYP_PAGE_OFFSET_HIGH_MASK));
	asm volatile(ALTERNATIVE("nop",
				 "and %0, %0, %1",
				 ARM64_HYP_OFFSET_LOW)
		     : "+r" (v)
		     : "i" (HYP_PAGE_OFFSET_LOW_MASK));
	return v;
}

#define kern_hyp_va(v) 	((typeof(v))(__kern_hyp_va((unsigned long)(v))))

/*
 * Obtain the PC-relative address of a kernel symbol
 * s: symbol
 *
 * The goal of this macro is to return a symbol's address based on a
 * PC-relative computation, as opposed to a loading the VA from a
 * constant pool or something similar. This works well for HYP, as an
 * absolute VA is guaranteed to be wrong. Only use this if trying to
 * obtain the address of a symbol (i.e. not something you obtained by
 * following a pointer).
 */
#define hyp_symbol_addr(s)						\
	({								\
		typeof(s) *addr;					\
		asm("adrp	%0, %1\n"				\
		    "add	%0, %0, :lo12:%1\n"			\
		    : "=r" (addr) : "S" (&s));				\
		addr;							\
	})

/*
 * We currently only support a 40bit IPA.
 */
#define KVM_PHYS_SHIFT	(40)
#define KVM_PHYS_SIZE	(1UL << KVM_PHYS_SHIFT)
#define KVM_PHYS_MASK	(KVM_PHYS_SIZE - 1UL)

#include <asm/stage2_pgtable.h>

int create_hyp_mappings(void *from, void *to, pgprot_t prot);
int create_hyp_io_mappings(void *from, void *to, phys_addr_t);
void free_hyp_pgds(void);

void stage2_unmap_vm(struct kvm *kvm);
int kvm_alloc_stage2_pgd(struct kvm *kvm);
void kvm_free_stage2_pgd(struct kvm *kvm);
int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
			  phys_addr_t pa, unsigned long size, bool writable);

int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);

void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);

phys_addr_t kvm_mmu_get_httbr(void);
phys_addr_t kvm_get_idmap_vector(void);
int kvm_mmu_init(void);
void kvm_clear_hyp_idmap(void);

#define	kvm_set_pte(ptep, pte)		set_pte(ptep, pte)
#define	kvm_set_pmd(pmdp, pmd)		set_pmd(pmdp, pmd)

static inline pte_t kvm_s2pte_mkwrite(pte_t pte)
{
	pte_val(pte) |= PTE_S2_RDWR;
	return pte;
}

static inline pmd_t kvm_s2pmd_mkwrite(pmd_t pmd)
{
	pmd_val(pmd) |= PMD_S2_RDWR;
	return pmd;
}

static inline void kvm_set_s2pte_readonly(pte_t *pte)
{
	pteval_t old_pteval, pteval;

pteval = READ_ONCE(pte_val(*pte));
	do {
		old_pteval = pteval;
		pteval &= ~PTE_S2_RDWR;
		pteval |= PTE_S2_RDONLY;
		pteval = cmpxchg_relaxed(&pte_val(*pte), old_pteval, pteval);
	} while (pteval != old_pteval);
}

static inline bool kvm_s2pte_readonly(pte_t *pte)
{
	return (pte_val(*pte) & PTE_S2_RDWR) == PTE_S2_RDONLY;
}

static inline void kvm_set_s2pmd_readonly(pmd_t *pmd)
{
	kvm_set_s2pte_readonly((pte_t *)pmd);
}

static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
{
	return kvm_s2pte_readonly((pte_t *)pmd);
}

static inline bool kvm_page_empty(void *ptr)
{
	struct page *ptr_page = virt_to_page(ptr);
	return page_count(ptr_page) == 1;
}

#define hyp_pte_table_empty(ptep) kvm_page_empty(ptep)

#ifdef __PAGETABLE_PMD_FOLDED
#define hyp_pmd_table_empty(pmdp) (0)
#else
#define hyp_pmd_table_empty(pmdp) kvm_page_empty(pmdp)
#endif

#ifdef __PAGETABLE_PUD_FOLDED
#define hyp_pud_table_empty(pudp) (0)
#else
#define hyp_pud_table_empty(pudp) kvm_page_empty(pudp)
#endif

struct kvm;

#define kvm_flush_dcache_to_poc(a,l)	__flush_dcache_area((a), (l))

static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu)
{
	return (vcpu_sys_reg(vcpu, SCTLR_EL1) & 0b101) == 0b101;
}

static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
					       kvm_pfn_t pfn,
					       unsigned long size)
{
	void *va = page_address(pfn_to_page(pfn));

kvm_flush_dcache_to_poc(va, size);

if (icache_is_aliasing()) {
		/* any kind of VIPT cache */
		__flush_icache_all();
	} else if (is_kernel_in_hyp_mode() || !icache_is_vpipt()) {
		/* PIPT or VPIPT at EL2 (see comment in __kvm_tlb_flush_vmid_ipa) */
		flush_icache_range((unsigned long)va,
				   (unsigned long)va + size);
	}
}

static inline void __kvm_flush_dcache_pte(pte_t pte)
{
	struct page *page = pte_page(pte);
	kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
}

static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
{
	struct page *page = pmd_page(pmd);
	kvm_flush_dcache_to_poc(page_address(page), PMD_SIZE);
}

static inline void __kvm_flush_dcache_pud(pud_t pud)
{
	struct page *page = pud_page(pud);
	kvm_flush_dcache_to_poc(page_address(page), PUD_SIZE);
}

#define kvm_virt_to_phys(x)		__pa_symbol(x)

void kvm_set_way_flush(struct kvm_vcpu *vcpu);
void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled);

static inline bool __kvm_cpu_uses_extended_idmap(void)
{
	return __cpu_uses_extended_idmap();
}

/*
 * Can't use pgd_populate here, because the extended idmap adds an extra level
 * above CONFIG_PGTABLE_LEVELS (which is 2 or 3 if we're using the extended
 * idmap), and pgd_populate is only available if CONFIG_PGTABLE_LEVELS = 4.
 */
static inline void __kvm_extend_hypmap(pgd_t *boot_hyp_pgd,
				       pgd_t *hyp_pgd,
				       pgd_t *merged_hyp_pgd,
				       unsigned long hyp_idmap_start)
{
	int idmap_idx;

/*
	 * Use the first entry to access the HYP mappings. It is
	 * guaranteed to be free, otherwise we wouldn't use an
	 * extended idmap.
	 */
	VM_BUG_ON(pgd_val(merged_hyp_pgd[0]));
	merged_hyp_pgd[0] = __pgd(__pa(hyp_pgd) | PMD_TYPE_TABLE);

/*
	 * Create another extended level entry that points to the boot HYP map,
	 * which contains an ID mapping of the HYP init code. We essentially
	 * merge the boot and runtime HYP maps by doing so, but they don't
	 * overlap anyway, so this is fine.
	 */
	idmap_idx = hyp_idmap_start >> VA_BITS;
	VM_BUG_ON(pgd_val(merged_hyp_pgd[idmap_idx]));
	merged_hyp_pgd[idmap_idx] = __pgd(__pa(boot_hyp_pgd) | PMD_TYPE_TABLE);
}

static inline unsigned int kvm_get_vmid_bits(void)
{
	int reg = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);

return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8;
}

/*
 * We are not in the kvm->srcu critical section most of the time, so we take
 * the SRCU read lock here. Since we copy the data from the user page, we
 * can immediately drop the lock again.
 */
static inline int kvm_read_guest_lock(struct kvm *kvm,
				      gpa_t gpa, void *data, unsigned long len)
{
	int srcu_idx = srcu_read_lock(&kvm->srcu);
	int ret = kvm_read_guest(kvm, gpa, data, len);

srcu_read_unlock(&kvm->srcu, srcu_idx);

return ret;
}

static inline int kvm_write_guest_lock(struct kvm *kvm, gpa_t gpa,
				       const void *data, unsigned long len)
{
	int srcu_idx = srcu_read_lock(&kvm->srcu);
	int ret = kvm_write_guest(kvm, gpa, data, len);

srcu_read_unlock(&kvm->srcu, srcu_idx);

return ret;
}

#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
#include <asm/mmu.h>

static inline void *kvm_get_hyp_vector(void)
{
	struct bp_hardening_data *data = arm64_get_bp_hardening_data();
	void *vect = kvm_ksym_ref(__kvm_hyp_vector);

if (data->template_start) {
		vect = __bp_harden_hyp_vecs_start +
		       data->hyp_vectors_slot * SZ_2K;

if (!has_vhe())
			vect = lm_alias(vect);
	}

return vect;
}

static inline int kvm_map_vectors(void)
{
	return create_hyp_mappings(kvm_ksym_ref(__bp_harden_hyp_vecs_start),
				   kvm_ksym_ref(__bp_harden_hyp_vecs_end),
				   PAGE_HYP_EXEC);
}

#else
static inline void *kvm_get_hyp_vector(void)
{
	return kvm_ksym_ref(__kvm_hyp_vector);
}

static inline int kvm_map_vectors(void)
{
	return 0;
}
#endif

#ifdef CONFIG_ARM64_SSBD
DECLARE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required);

static inline int hyp_map_aux_data(void)
{
	int cpu, err;

for_each_possible_cpu(cpu) {
		u64 *ptr;

ptr = per_cpu_ptr(&arm64_ssbd_callback_required, cpu);
		err = create_hyp_mappings(ptr, ptr + 1, PAGE_HYP);
		if (err)
			return err;
	}
	return 0;
}
#else
static inline int hyp_map_aux_data(void)
{
	return 0;
}
#endif

#endif /* __ASSEMBLY__ */
#endif /* __ARM64_KVM_MMU_H__ */