OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:12 AM	rwxr-xr-x
📄 Kbuild	703 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acenv.h	541 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acpi.h	4.34 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 alternative.h	7.63 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 arch_gicv3.h	3.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_timer.h	4.87 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 arm-cci.h	794 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-bug.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-uaccess.h	2.09 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 assembler.h	13.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic.h	8.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic_ll_sc.h	10.61 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic_lse.h	14.82 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 barrier.h	3.78 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bitops.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitrev.h	452 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 boot.h	384 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 brk-imm.h	706 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	2.23 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cacheflush.h	4.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	1.35 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 clocksource.h	192 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	7.98 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 compat.h	7.15 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 compiler.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu.h	1.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpu_ops.h	2.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpucaps.h	1.87 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpufeature.h	19.14 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpuidle.h	401 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cputype.h	8.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 current.h	517 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 daifflags.h	1.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dcc.h	1.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 debug-monitors.h	3.76 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 device.h	886 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmi.h	850 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 efi.h	4.57 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 elf.h	5.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 esr.h	9.02 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 exception.h	1.21 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 exec.h	868 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	815 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	1000 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	2.91 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 fpsimd.h	4.21 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 fpsimdmacros.h	5.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	1.92 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 futex.h	3.41 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 hardirq.h	2.08 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 hugetlb.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	4.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwcap.h	1.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hypervisor.h	144 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 insn.h	16.03 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 io.h	7.72 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 irq.h	307 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_work.h	228 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	2.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	1.68 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kasan.h	1.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kernel-pgtable.h	4.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	3.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	1.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_arm.h	8.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_asm.h	4.26 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_coproc.h	2.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_emulate.h	10.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_host.h	15.73 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_hyp.h	5.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_mmio.h	1.3 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_mmu.h	11.72 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 linkage.h	114 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 lse.h	1.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 memblock.h	720 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 memory.h	9.16 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu.h	2.76 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu_context.h	6.35 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmzone.h	266 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	2.8 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 neon.h	815 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 numa.h	1.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 page-def.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	1.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 paravirt.h	458 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	878 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	7.48 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 perf_event.h	3.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	3.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-hwdef.h	9.4 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-prot.h	4.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-types.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	21.55 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 probes.h	1022 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 proc-fns.h	1.21 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 processor.h	6.52 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 ptdump.h	1.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	9 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 sdei.h	1.46 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 seccomp.h	714 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	1.46 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 shmparam.h	965 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal32.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 simd.h	1.39 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 smp.h	4.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_plat.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	3.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 spinlock_types.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stack_pointer.h	247 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	2.53 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 stage2_pgtable-nopmd.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stage2_pgtable-nopud.h	1.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stage2_pgtable.h	4.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stat.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	2.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 suspend.h	1.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sync_bitops.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sysreg.h	25.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 system_misc.h	1.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.93 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 timex.h	883 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	2.22 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlbflush.h	5.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 topology.h	1.29 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 traps.h	3.33 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 uaccess.h	12.01 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unistd.h	1.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd32.h	27.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	777 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vdso.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vdso_datapage.h	1.53 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vectors.h	1.75 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 virt.h	3 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vmap_stack.h	769 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 word-at-a-time.h	2.22 KB	06/16/2023 05:32:39 PM	rw-r--r--
📁 xen	-	05/09/2024 07:14:16 AM	rwxr-xr-x

Editing: cmpxchg.h

/*
 * Based on arch/arm/include/asm/cmpxchg.h
 *
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_CMPXCHG_H
#define __ASM_CMPXCHG_H

#include <linux/bug.h>

#include <asm/atomic.h>
#include <asm/barrier.h>
#include <asm/lse.h>

/*
 * We need separate acquire parameters for ll/sc and lse, since the full
 * barrier case is generated as release+dmb for the former and
 * acquire+release for the latter.
 */
#define __XCHG_CASE(w, sfx, name, sz, mb, nop_lse, acq, acq_lse, rel, cl)	\
static inline u##sz __xchg_case_##name##sz(u##sz x, volatile void *ptr)		\
{										\
	u##sz ret;								\
	unsigned long tmp;							\
										\
	asm volatile(ARM64_LSE_ATOMIC_INSN(					\
	/* LL/SC */								\
	"	prfm	pstl1strm, %2\n"					\
	"1:	ld" #acq "xr" #sfx "\t%" #w "0, %2\n"				\
	"	st" #rel "xr" #sfx "\t%w1, %" #w "3, %2\n"			\
	"	cbnz	%w1, 1b\n"						\
	"	" #mb,								\
	/* LSE atomics */							\
	"	swp" #acq_lse #rel #sfx "\t%" #w "3, %" #w "0, %2\n"		\
		__nops(3)							\
	"	" #nop_lse)							\
	: "=&r" (ret), "=&r" (tmp), "+Q" (*(u##sz *)ptr)			\
	: "r" (x)								\
	: cl);									\
										\
	return ret;								\
}

__XCHG_CASE(w, b,     ,  8,        ,    ,  ,  ,  ,         )
__XCHG_CASE(w, h,     , 16,        ,    ,  ,  ,  ,         )
__XCHG_CASE(w,  ,     , 32,        ,    ,  ,  ,  ,         )
__XCHG_CASE( ,  ,     , 64,        ,    ,  ,  ,  ,         )
__XCHG_CASE(w, b, acq_,  8,        ,    , a, a,  , "memory")
__XCHG_CASE(w, h, acq_, 16,        ,    , a, a,  , "memory")
__XCHG_CASE(w,  , acq_, 32,        ,    , a, a,  , "memory")
__XCHG_CASE( ,  , acq_, 64,        ,    , a, a,  , "memory")
__XCHG_CASE(w, b, rel_,  8,        ,    ,  ,  , l, "memory")
__XCHG_CASE(w, h, rel_, 16,        ,    ,  ,  , l, "memory")
__XCHG_CASE(w,  , rel_, 32,        ,    ,  ,  , l, "memory")
__XCHG_CASE( ,  , rel_, 64,        ,    ,  ,  , l, "memory")
__XCHG_CASE(w, b,  mb_,  8, dmb ish, nop,  , a, l, "memory")
__XCHG_CASE(w, h,  mb_, 16, dmb ish, nop,  , a, l, "memory")
__XCHG_CASE(w,  ,  mb_, 32, dmb ish, nop,  , a, l, "memory")
__XCHG_CASE( ,  ,  mb_, 64, dmb ish, nop,  , a, l, "memory")

#undef __XCHG_CASE

#define __XCHG_GEN(sfx)							\
static __always_inline  unsigned long __xchg##sfx(unsigned long x,	\
					volatile void *ptr,		\
					int size)			\
{									\
	switch (size) {							\
	case 1:								\
		return __xchg_case##sfx##_8(x, ptr);			\
	case 2:								\
		return __xchg_case##sfx##_16(x, ptr);			\
	case 4:								\
		return __xchg_case##sfx##_32(x, ptr);			\
	case 8:								\
		return __xchg_case##sfx##_64(x, ptr);			\
	default:							\
		BUILD_BUG();						\
	}								\
									\
	unreachable();							\
}

__XCHG_GEN()
__XCHG_GEN(_acq)
__XCHG_GEN(_rel)
__XCHG_GEN(_mb)

#undef __XCHG_GEN

#define __xchg_wrapper(sfx, ptr, x)					\
({									\
	__typeof__(*(ptr)) __ret;					\
	__ret = (__typeof__(*(ptr)))					\
		__xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \
	__ret;								\
})

/* xchg */
#define xchg_relaxed(...)	__xchg_wrapper(    , __VA_ARGS__)
#define xchg_acquire(...)	__xchg_wrapper(_acq, __VA_ARGS__)
#define xchg_release(...)	__xchg_wrapper(_rel, __VA_ARGS__)
#define xchg(...)		__xchg_wrapper( _mb, __VA_ARGS__)

#define __CMPXCHG_GEN(sfx)						\
static __always_inline unsigned long __cmpxchg##sfx(volatile void *ptr,	\
					   unsigned long old,		\
					   unsigned long new,		\
					   int size)			\
{									\
	switch (size) {							\
	case 1:								\
		return __cmpxchg_case##sfx##_8(ptr, (u8)old, new);	\
	case 2:								\
		return __cmpxchg_case##sfx##_16(ptr, (u16)old, new);	\
	case 4:								\
		return __cmpxchg_case##sfx##_32(ptr, old, new);		\
	case 8:								\
		return __cmpxchg_case##sfx##_64(ptr, old, new);		\
	default:							\
		BUILD_BUG();						\
	}								\
									\
	unreachable();							\
}

__CMPXCHG_GEN()
__CMPXCHG_GEN(_acq)
__CMPXCHG_GEN(_rel)
__CMPXCHG_GEN(_mb)

#undef __CMPXCHG_GEN

#define __cmpxchg_wrapper(sfx, ptr, o, n)				\
({									\
	__typeof__(*(ptr)) __ret;					\
	__ret = (__typeof__(*(ptr)))					\
		__cmpxchg##sfx((ptr), (unsigned long)(o),		\
				(unsigned long)(n), sizeof(*(ptr)));	\
	__ret;								\
})

/* cmpxchg */
#define cmpxchg_relaxed(...)	__cmpxchg_wrapper(    , __VA_ARGS__)
#define cmpxchg_acquire(...)	__cmpxchg_wrapper(_acq, __VA_ARGS__)
#define cmpxchg_release(...)	__cmpxchg_wrapper(_rel, __VA_ARGS__)
#define cmpxchg(...)		__cmpxchg_wrapper( _mb, __VA_ARGS__)
#define cmpxchg_local		cmpxchg_relaxed

/* cmpxchg64 */
#define cmpxchg64_relaxed	cmpxchg_relaxed
#define cmpxchg64_acquire	cmpxchg_acquire
#define cmpxchg64_release	cmpxchg_release
#define cmpxchg64		cmpxchg
#define cmpxchg64_local		cmpxchg_local

/* cmpxchg_double */
#define system_has_cmpxchg_double()     1

#define __cmpxchg_double_check(ptr1, ptr2)					\
({										\
	if (sizeof(*(ptr1)) != 8)						\
		BUILD_BUG();							\
	VM_BUG_ON((unsigned long *)(ptr2) - (unsigned long *)(ptr1) != 1);	\
})

#define cmpxchg_double(ptr1, ptr2, o1, o2, n1, n2) \
({\
	int __ret;\
	__cmpxchg_double_check(ptr1, ptr2); \
	__ret = !__cmpxchg_double_mb((unsigned long)(o1), (unsigned long)(o2), \
				     (unsigned long)(n1), (unsigned long)(n2), \
				     ptr1); \
	__ret; \
})

#define cmpxchg_double_local(ptr1, ptr2, o1, o2, n1, n2) \
({\
	int __ret;\
	__cmpxchg_double_check(ptr1, ptr2); \
	__ret = !__cmpxchg_double((unsigned long)(o1), (unsigned long)(o2), \
				  (unsigned long)(n1), (unsigned long)(n2), \
				  ptr1); \
	__ret; \
})

/* this_cpu_cmpxchg */
#define _protect_cmpxchg_local(pcp, o, n)			\
({								\
	typeof(*raw_cpu_ptr(&(pcp))) __ret;			\
	preempt_disable();					\
	__ret = cmpxchg_local(raw_cpu_ptr(&(pcp)), o, n);	\
	preempt_enable();					\
	__ret;							\
})

#define this_cpu_cmpxchg_1(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
#define this_cpu_cmpxchg_2(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
#define this_cpu_cmpxchg_4(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
#define this_cpu_cmpxchg_8(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)

#define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2)		\
({									\
	int __ret;							\
	preempt_disable();						\
	__ret = cmpxchg_double_local(	raw_cpu_ptr(&(ptr1)),		\
					raw_cpu_ptr(&(ptr2)),		\
					o1, o2, n1, n2);		\
	preempt_enable();						\
	__ret;								\
})

#define __CMPWAIT_CASE(w, sfx, sz)					\
static inline void __cmpwait_case_##sz(volatile void *ptr,		\
				       unsigned long val)		\
{									\
	unsigned long tmp;						\
									\
	asm volatile(							\
	"	sevl\n"							\
	"	wfe\n"							\
	"	ldxr" #sfx "\t%" #w "[tmp], %[v]\n"			\
	"	eor	%" #w "[tmp], %" #w "[tmp], %" #w "[val]\n"	\
	"	cbnz	%" #w "[tmp], 1f\n"				\
	"	wfe\n"							\
	"1:"								\
	: [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr)		\
	: [val] "r" (val));						\
}

__CMPWAIT_CASE(w, b, 8);
__CMPWAIT_CASE(w, h, 16);
__CMPWAIT_CASE(w,  , 32);
__CMPWAIT_CASE( ,  , 64);

#undef __CMPWAIT_CASE

#define __CMPWAIT_GEN(sfx)						\
static __always_inline void __cmpwait##sfx(volatile void *ptr,		\
				  unsigned long val,			\
				  int size)				\
{									\
	switch (size) {							\
	case 1:								\
		return __cmpwait_case##sfx##_8(ptr, (u8)val);		\
	case 2:								\
		return __cmpwait_case##sfx##_16(ptr, (u16)val);		\
	case 4:								\
		return __cmpwait_case##sfx##_32(ptr, val);		\
	case 8:								\
		return __cmpwait_case##sfx##_64(ptr, val);		\
	default:							\
		BUILD_BUG();						\
	}								\
									\
	unreachable();							\
}

__CMPWAIT_GEN()

#undef __CMPWAIT_GEN

#define __cmpwait_relaxed(ptr, val) \
	__cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr)))

#endif	/* __ASM_CMPXCHG_H */