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11/17/2022 06:42:15 AM
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Kbuild
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acenv.h
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asm-offsets.h
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asm-prototypes.h
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asmmacro.h
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elf.h
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emergency-restart.h
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exception.h
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export.h
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hpsim.h
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hw_irq.h
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idle.h
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intrinsics.h
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irq_regs.h
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irq_remapping.h
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irqflags.h
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kregs.h
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local.h
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machvec.h
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machvec_dig.h
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machvec_dig_vtd.h
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machvec_hpsim.h
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machvec_hpzx1.h
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machvec_hpzx1_swiotlb.h
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machvec_sn2.h
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machvec_uv.h
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mca.h
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mca_asm.h
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meminit.h
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mman.h
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mmu.h
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mmu_context.h
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mmzone.h
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nodedata.h
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numa.h
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page.h
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pal.h
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param.h
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parport.h
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patch.h
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pci.h
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percpu.h
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perfmon.h
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pgalloc.h
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pgtable.h
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processor.h
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ptrace.h
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rwsem.h
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sal.h
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sections.h
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segment.h
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serial.h
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shmparam.h
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signal.h
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smp.h
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sn
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sparsemem.h
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spinlock.h
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spinlock_types.h
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string.h
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swiotlb.h
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switch_to.h
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syscall.h
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termios.h
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thread_info.h
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timex.h
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tlb.h
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tlbflush.h
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topology.h
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types.h
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uaccess.h
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unaligned.h
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uncached.h
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unistd.h
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unwind.h
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user.h
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uv
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vga.h
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xor.h
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Editing: tlbflush.h
Close
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_IA64_TLBFLUSH_H #define _ASM_IA64_TLBFLUSH_H /* * Copyright (C) 2002 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> */ #include <linux/mm.h> #include <asm/intrinsics.h> #include <asm/mmu_context.h> #include <asm/page.h> /* * Now for some TLB flushing routines. This is the kind of stuff that * can be very expensive, so try to avoid them whenever possible. */ extern void setup_ptcg_sem(int max_purges, int from_palo); /* * Flush everything (kernel mapping may also have changed due to * vmalloc/vfree). */ extern void local_flush_tlb_all (void); #ifdef CONFIG_SMP extern void smp_flush_tlb_all (void); extern void smp_flush_tlb_mm (struct mm_struct *mm); extern void smp_flush_tlb_cpumask (cpumask_t xcpumask); # define flush_tlb_all() smp_flush_tlb_all() #else # define flush_tlb_all() local_flush_tlb_all() # define smp_flush_tlb_cpumask(m) local_flush_tlb_all() #endif static inline void local_finish_flush_tlb_mm (struct mm_struct *mm) { if (mm == current->active_mm) activate_context(mm); } /* * Flush a specified user mapping. This is called, e.g., as a result of fork() and * exit(). fork() ends up here because the copy-on-write mechanism needs to write-protect * the PTEs of the parent task. */ static inline void flush_tlb_mm (struct mm_struct *mm) { if (!mm) return; set_bit(mm->context, ia64_ctx.flushmap); mm->context = 0; if (atomic_read(&mm->mm_users) == 0) return; /* happens as a result of exit_mmap() */ #ifdef CONFIG_SMP smp_flush_tlb_mm(mm); #else local_finish_flush_tlb_mm(mm); #endif } extern void flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end); /* * Page-granular tlb flush. */ static inline void flush_tlb_page (struct vm_area_struct *vma, unsigned long addr) { #ifdef CONFIG_SMP flush_tlb_range(vma, (addr & PAGE_MASK), (addr & PAGE_MASK) + PAGE_SIZE); #else if (vma->vm_mm == current->active_mm) ia64_ptcl(addr, (PAGE_SHIFT << 2)); else vma->vm_mm->context = 0; #endif } /* * Flush the local TLB. Invoked from another cpu using an IPI. */ #ifdef CONFIG_SMP void smp_local_flush_tlb(void); #else #define smp_local_flush_tlb() #endif static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) { flush_tlb_all(); /* XXX fix me */ } #endif /* _ASM_IA64_TLBFLUSH_H */