OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	224 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acenv.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 acpi-ext.h	590 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acpi.h	4.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp.h	857 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	890 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro.h	3.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	9.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	2.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	10.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	404 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 bugs.h	436 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	1.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	2.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	276 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu.h	456 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cputime.h	855 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 current.h	418 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cyclone.h	442 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	1.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	323 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	466 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmi.h	343 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 early_ioremap.h	428 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	9.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 emergency-restart.h	149 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 esi.h	887 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 exception.h	1.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 export.h	115 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	330 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	569 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpswa.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	748 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 gcc_intrin.h	368 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	564 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hpsim.h	364 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	6.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 idle.h	200 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intrinsics.h	306 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	11.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu.h	555 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu_table.h	175 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iosapic.h	3.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_regs.h	34 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_remapping.h	142 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	2.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	1.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	260 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	3.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kregs.h	6.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 libata-portmap.h	225 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	398 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local64.h	33 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec.h	12.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_dig.h	449 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_dig_vtd.h	558 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_hpsim.h	544 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_hpzx1.h	544 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_hpzx1_swiotlb.h	632 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_init.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_sn2.h	4.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_uv.h	684 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mca.h	5.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mca_asm.h	7.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 meminit.h	2.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mman.h	432 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	374 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	5.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msidef.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 native	-	11/17/2022 06:42:19 AM	rwxr-xr-x
📄 nodedata.h	1.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 numa.h	2.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	6.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pal.h	53.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 param.h	439 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	534 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 patch.h	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perfmon.h	4.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	2.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	20.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	17.98 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ptrace.h	5.2 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 rwsem.h	3.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sal.h	26.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	1.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	162 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	446 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	445 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	749 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	3.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 sn	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 sparsemem.h	621 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	6.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	475 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	659 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 swiotlb.h	344 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	2.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.06 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 termios.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	4.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	1.47 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	8.42 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlbflush.h	2.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	1.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	828 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	9.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	337 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uncached.h	463 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	5.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	2.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ustack.h	403 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 uv	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 vga.h	657 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: atomic.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_IA64_ATOMIC_H
#define _ASM_IA64_ATOMIC_H

/*
 * Atomic operations that C can't guarantee us.  Useful for
 * resource counting etc..
 *
 * NOTE: don't mess with the types below!  The "unsigned long" and
 * "int" types were carefully placed so as to ensure proper operation
 * of the macros.
 *
 * Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co
 *	David Mosberger-Tang <davidm@hpl.hp.com>
 */
#include <linux/types.h>

#include <asm/intrinsics.h>
#include <asm/barrier.h>

#define ATOMIC_INIT(i)		{ (i) }
#define ATOMIC64_INIT(i)	{ (i) }

#define atomic_read(v)		READ_ONCE((v)->counter)
#define atomic64_read(v)	READ_ONCE((v)->counter)

#define atomic_set(v,i)		WRITE_ONCE(((v)->counter), (i))
#define atomic64_set(v,i)	WRITE_ONCE(((v)->counter), (i))

#define ATOMIC_OP(op, c_op)						\
static __inline__ int							\
ia64_atomic_##op (int i, atomic_t *v)					\
{									\
	__s32 old, new;							\
	CMPXCHG_BUGCHECK_DECL						\
									\
	do {								\
		CMPXCHG_BUGCHECK(v);					\
		old = atomic_read(v);					\
		new = old c_op i;					\
	} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
	return new;							\
}

#define ATOMIC_FETCH_OP(op, c_op)					\
static __inline__ int							\
ia64_atomic_fetch_##op (int i, atomic_t *v)				\
{									\
	__s32 old, new;							\
	CMPXCHG_BUGCHECK_DECL						\
									\
	do {								\
		CMPXCHG_BUGCHECK(v);					\
		old = atomic_read(v);					\
		new = old c_op i;					\
	} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
	return old;							\
}

#define ATOMIC_OPS(op, c_op)						\
	ATOMIC_OP(op, c_op)						\
	ATOMIC_FETCH_OP(op, c_op)

ATOMIC_OPS(add, +)
ATOMIC_OPS(sub, -)

#ifdef __OPTIMIZE__
#define __ia64_atomic_const(i)	__builtin_constant_p(i) ?		\
		((i) == 1 || (i) == 4 || (i) == 8 || (i) == 16 ||	\
		 (i) == -1 || (i) == -4 || (i) == -8 || (i) == -16) : 0

#define atomic_add_return(i, v)						\
({									\
	int __i = (i);							\
	static const int __ia64_atomic_p = __ia64_atomic_const(i);	\
	__ia64_atomic_p ? ia64_fetch_and_add(__i, &(v)->counter) :	\
				ia64_atomic_add(__i, v);		\
})

#define atomic_sub_return(i, v)						\
({									\
	int __i = (i);							\
	static const int __ia64_atomic_p = __ia64_atomic_const(i);	\
	__ia64_atomic_p ? ia64_fetch_and_add(-__i, &(v)->counter) :	\
				ia64_atomic_sub(__i, v);		\
})
#else
#define atomic_add_return(i, v)	ia64_atomic_add(i, v)
#define atomic_sub_return(i, v)	ia64_atomic_sub(i, v)
#endif

#define atomic_fetch_add(i,v)						\
({									\
	int __ia64_aar_i = (i);						\
	(__builtin_constant_p(i)					\
	 && (   (__ia64_aar_i ==  1) || (__ia64_aar_i ==   4)		\
	     || (__ia64_aar_i ==  8) || (__ia64_aar_i ==  16)		\
	     || (__ia64_aar_i == -1) || (__ia64_aar_i ==  -4)		\
	     || (__ia64_aar_i == -8) || (__ia64_aar_i == -16)))		\
		? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq)	\
		: ia64_atomic_fetch_add(__ia64_aar_i, v);		\
})

#define atomic_fetch_sub(i,v)						\
({									\
	int __ia64_asr_i = (i);						\
	(__builtin_constant_p(i)					\
	 && (   (__ia64_asr_i ==   1) || (__ia64_asr_i ==   4)		\
	     || (__ia64_asr_i ==   8) || (__ia64_asr_i ==  16)		\
	     || (__ia64_asr_i ==  -1) || (__ia64_asr_i ==  -4)		\
	     || (__ia64_asr_i ==  -8) || (__ia64_asr_i == -16)))	\
		? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq)	\
		: ia64_atomic_fetch_sub(__ia64_asr_i, v);		\
})

ATOMIC_FETCH_OP(and, &)
ATOMIC_FETCH_OP(or, |)
ATOMIC_FETCH_OP(xor, ^)

#define atomic_and(i,v)	(void)ia64_atomic_fetch_and(i,v)
#define atomic_or(i,v)	(void)ia64_atomic_fetch_or(i,v)
#define atomic_xor(i,v)	(void)ia64_atomic_fetch_xor(i,v)

#define atomic_fetch_and(i,v)	ia64_atomic_fetch_and(i,v)
#define atomic_fetch_or(i,v)	ia64_atomic_fetch_or(i,v)
#define atomic_fetch_xor(i,v)	ia64_atomic_fetch_xor(i,v)

#undef ATOMIC_OPS
#undef ATOMIC_FETCH_OP
#undef ATOMIC_OP

#define ATOMIC64_OP(op, c_op)						\
static __inline__ long							\
ia64_atomic64_##op (__s64 i, atomic64_t *v)				\
{									\
	__s64 old, new;							\
	CMPXCHG_BUGCHECK_DECL						\
									\
	do {								\
		CMPXCHG_BUGCHECK(v);					\
		old = atomic64_read(v);					\
		new = old c_op i;					\
	} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \
	return new;							\
}

#define ATOMIC64_FETCH_OP(op, c_op)					\
static __inline__ long							\
ia64_atomic64_fetch_##op (__s64 i, atomic64_t *v)			\
{									\
	__s64 old, new;							\
	CMPXCHG_BUGCHECK_DECL						\
									\
	do {								\
		CMPXCHG_BUGCHECK(v);					\
		old = atomic64_read(v);					\
		new = old c_op i;					\
	} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \
	return old;							\
}

#define ATOMIC64_OPS(op, c_op)						\
	ATOMIC64_OP(op, c_op)						\
	ATOMIC64_FETCH_OP(op, c_op)

ATOMIC64_OPS(add, +)
ATOMIC64_OPS(sub, -)

#define atomic64_add_return(i,v)					\
({									\
	long __ia64_aar_i = (i);					\
	(__builtin_constant_p(i)					\
	 && (   (__ia64_aar_i ==  1) || (__ia64_aar_i ==   4)		\
	     || (__ia64_aar_i ==  8) || (__ia64_aar_i ==  16)		\
	     || (__ia64_aar_i == -1) || (__ia64_aar_i ==  -4)		\
	     || (__ia64_aar_i == -8) || (__ia64_aar_i == -16)))		\
		? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter)	\
		: ia64_atomic64_add(__ia64_aar_i, v);			\
})

#define atomic64_sub_return(i,v)					\
({									\
	long __ia64_asr_i = (i);					\
	(__builtin_constant_p(i)					\
	 && (   (__ia64_asr_i ==   1) || (__ia64_asr_i ==   4)		\
	     || (__ia64_asr_i ==   8) || (__ia64_asr_i ==  16)		\
	     || (__ia64_asr_i ==  -1) || (__ia64_asr_i ==  -4)		\
	     || (__ia64_asr_i ==  -8) || (__ia64_asr_i == -16)))	\
		? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter)	\
		: ia64_atomic64_sub(__ia64_asr_i, v);			\
})

#define atomic64_fetch_add(i,v)						\
({									\
	long __ia64_aar_i = (i);					\
	(__builtin_constant_p(i)					\
	 && (   (__ia64_aar_i ==  1) || (__ia64_aar_i ==   4)		\
	     || (__ia64_aar_i ==  8) || (__ia64_aar_i ==  16)		\
	     || (__ia64_aar_i == -1) || (__ia64_aar_i ==  -4)		\
	     || (__ia64_aar_i == -8) || (__ia64_aar_i == -16)))		\
		? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq)	\
		: ia64_atomic64_fetch_add(__ia64_aar_i, v);		\
})

#define atomic64_fetch_sub(i,v)						\
({									\
	long __ia64_asr_i = (i);					\
	(__builtin_constant_p(i)					\
	 && (   (__ia64_asr_i ==   1) || (__ia64_asr_i ==   4)		\
	     || (__ia64_asr_i ==   8) || (__ia64_asr_i ==  16)		\
	     || (__ia64_asr_i ==  -1) || (__ia64_asr_i ==  -4)		\
	     || (__ia64_asr_i ==  -8) || (__ia64_asr_i == -16)))	\
		? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq)	\
		: ia64_atomic64_fetch_sub(__ia64_asr_i, v);		\
})

ATOMIC64_FETCH_OP(and, &)
ATOMIC64_FETCH_OP(or, |)
ATOMIC64_FETCH_OP(xor, ^)

#define atomic64_and(i,v)	(void)ia64_atomic64_fetch_and(i,v)
#define atomic64_or(i,v)	(void)ia64_atomic64_fetch_or(i,v)
#define atomic64_xor(i,v)	(void)ia64_atomic64_fetch_xor(i,v)

#define atomic64_fetch_and(i,v)	ia64_atomic64_fetch_and(i,v)
#define atomic64_fetch_or(i,v)	ia64_atomic64_fetch_or(i,v)
#define atomic64_fetch_xor(i,v)	ia64_atomic64_fetch_xor(i,v)

#undef ATOMIC64_OPS
#undef ATOMIC64_FETCH_OP
#undef ATOMIC64_OP

#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

#define atomic64_cmpxchg(v, old, new) \
	(cmpxchg(&((v)->counter), old, new))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))

static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
{
	int c, old;
	c = atomic_read(v);
	for (;;) {
		if (unlikely(c == (u)))
			break;
		old = atomic_cmpxchg((v), c, c + (a));
		if (likely(old == c))
			break;
		c = old;
	}
	return c;
}

static __inline__ long atomic64_add_unless(atomic64_t *v, long a, long u)
{
	long c, old;
	c = atomic64_read(v);
	for (;;) {
		if (unlikely(c == (u)))
			break;
		old = atomic64_cmpxchg((v), c, c + (a));
		if (likely(old == c))
			break;
		c = old;
	}
	return c != (u);
}

#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)

static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
{
	long c, old, dec;
	c = atomic64_read(v);
	for (;;) {
		dec = c - 1;
		if (unlikely(dec < 0))
			break;
		old = atomic64_cmpxchg((v), c, dec);
		if (likely(old == c))
			break;
		c = old;
	}
	return dec;
}

/*
 * Atomically add I to V and return TRUE if the resulting value is
 * negative.
 */
static __inline__ int
atomic_add_negative (int i, atomic_t *v)
{
	return atomic_add_return(i, v) < 0;
}

static __inline__ long
atomic64_add_negative (__s64 i, atomic64_t *v)
{
	return atomic64_add_return(i, v) < 0;
}

#define atomic_dec_return(v)		atomic_sub_return(1, (v))
#define atomic_inc_return(v)		atomic_add_return(1, (v))
#define atomic64_dec_return(v)		atomic64_sub_return(1, (v))
#define atomic64_inc_return(v)		atomic64_add_return(1, (v))

#define atomic_sub_and_test(i,v)	(atomic_sub_return((i), (v)) == 0)
#define atomic_dec_and_test(v)		(atomic_sub_return(1, (v)) == 0)
#define atomic_inc_and_test(v)		(atomic_add_return(1, (v)) == 0)
#define atomic64_sub_and_test(i,v)	(atomic64_sub_return((i), (v)) == 0)
#define atomic64_dec_and_test(v)	(atomic64_sub_return(1, (v)) == 0)
#define atomic64_inc_and_test(v)	(atomic64_add_return(1, (v)) == 0)

#define atomic_add(i,v)			(void)atomic_add_return((i), (v))
#define atomic_sub(i,v)			(void)atomic_sub_return((i), (v))
#define atomic_inc(v)			atomic_add(1, (v))
#define atomic_dec(v)			atomic_sub(1, (v))

#define atomic64_add(i,v)		(void)atomic64_add_return((i), (v))
#define atomic64_sub(i,v)		(void)atomic64_sub_return((i), (v))
#define atomic64_inc(v)			atomic64_add(1, (v))
#define atomic64_dec(v)			atomic64_sub(1, (v))

#endif /* _ASM_IA64_ATOMIC_H */