OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	224 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acenv.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 acpi-ext.h	590 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 acpi.h	4.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp.h	857 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	890 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro.h	3.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	9.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	2.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	10.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	404 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 bugs.h	436 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	1.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	2.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	276 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu.h	456 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cputime.h	855 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 current.h	418 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cyclone.h	442 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	1.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	323 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	466 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmi.h	343 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 early_ioremap.h	428 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	9.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 emergency-restart.h	149 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 esi.h	887 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 exception.h	1.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 export.h	115 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	330 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	569 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpswa.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	748 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 gcc_intrin.h	368 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	564 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hpsim.h	364 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	6.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 idle.h	200 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intrinsics.h	306 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	11.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu.h	555 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu_table.h	175 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iosapic.h	3.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_regs.h	34 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_remapping.h	142 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	2.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	1.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	260 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	3.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kregs.h	6.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 libata-portmap.h	225 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	398 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local64.h	33 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec.h	12.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_dig.h	449 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_dig_vtd.h	558 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_hpsim.h	544 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_hpzx1.h	544 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_hpzx1_swiotlb.h	632 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_init.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_sn2.h	4.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec_uv.h	684 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mca.h	5.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mca_asm.h	7.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 meminit.h	2.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mman.h	432 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	374 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	5.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msidef.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 native	-	11/17/2022 06:42:19 AM	rwxr-xr-x
📄 nodedata.h	1.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 numa.h	2.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	6.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pal.h	53.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 param.h	439 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	534 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 patch.h	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perfmon.h	4.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	2.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	20.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	17.98 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ptrace.h	5.2 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 rwsem.h	3.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sal.h	26.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	1.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	162 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	446 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	445 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	749 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	3.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 sn	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 sparsemem.h	621 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	6.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	475 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	659 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 swiotlb.h	344 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	2.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.06 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 termios.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	4.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	1.47 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	8.42 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlbflush.h	2.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	1.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	828 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	9.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	337 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uncached.h	463 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	5.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	2.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ustack.h	403 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 uv	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 vga.h	657 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--

Name

Size

Modified

Perms

📁 ..

11/17/2022 06:42:15 AM

rwxr-xr-x

📄 Kbuild

224 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 acenv.h

1.27 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 acpi-ext.h

590 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 acpi.h

4.1 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 agp.h

857 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 asm-offsets.h

35 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 asm-prototypes.h

890 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 asmmacro.h

3.29 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 atomic.h

9.47 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 barrier.h

2.36 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops.h

10.84 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bug.h

404 bytes

11/01/2022 04:52:05 PM

rw-r--r--

📄 bugs.h

436 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cache.h

771 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cacheflush.h

1.71 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 checksum.h

2.1 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 clocksource.h

276 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cpu.h

456 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cputime.h

855 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 current.h

418 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cyclone.h

442 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 delay.h

1.7 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 device.h

323 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 div64.h

31 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma-mapping.h

1.17 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma.h

466 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 dmi.h

343 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 early_ioremap.h

428 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 elf.h

9.83 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 emergency-restart.h

149 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 esi.h

887 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 exception.h

1.13 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 export.h

115 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 extable.h

330 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 fb.h

569 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 fpswa.h

1.88 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 ftrace.h

748 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 futex.h

2.56 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 gcc_intrin.h

368 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 hardirq.h

564 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 hpsim.h

364 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 hugetlb.h

1.67 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 hw_irq.h

6.33 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 idle.h

200 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 intrinsics.h

306 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 io.h

11.77 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 iommu.h

555 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 iommu_table.h

175 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 iosapic.h

3.16 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 irq.h

1.02 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 irq_regs.h

34 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 irq_remapping.h

142 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 irqflags.h

2.11 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 kdebug.h

1.64 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 kexec.h

1.57 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 kmap_types.h

260 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 kprobes.h

3.82 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 kregs.h

6.73 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 libata-portmap.h

225 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 linkage.h

398 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 local.h

31 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 local64.h

33 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec.h

12.1 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_dig.h

449 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_dig_vtd.h

558 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_hpsim.h

544 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_hpzx1.h

544 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_hpzx1_swiotlb.h

632 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_init.h

1.33 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_sn2.h

4.71 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec_uv.h

684 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 mca.h

5.91 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mca_asm.h

7.18 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 meminit.h

2.24 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mman.h

432 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu.h

374 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu_context.h

5.29 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmzone.h

1.1 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 module.h

1.1 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 msidef.h

1.4 KB

01/28/2018 09:20:33 PM

rw-r--r--

📁 native

11/17/2022 06:42:19 AM

rwxr-xr-x

📄 nodedata.h

1.85 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 numa.h

2.18 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 page.h

6.49 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pal.h

53.39 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 param.h

439 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 parport.h

534 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 patch.h

1.19 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pci.h

2.83 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 percpu.h

1.32 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 perfmon.h

4.33 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pgalloc.h

2.84 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pgtable.h

20.92 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 processor.h

17.98 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 ptrace.h

5.2 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 rwsem.h

3.82 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 sal.h

26.51 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 sections.h

1.35 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 segment.h

162 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 serial.h

446 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 shmparam.h

445 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 signal.h

749 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 smp.h

3.21 KB

01/28/2018 09:20:33 PM

rw-r--r--

📁 sn

11/17/2022 06:42:20 AM

rwxr-xr-x

📄 sparsemem.h

621 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 spinlock.h

6.92 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 spinlock_types.h

475 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 string.h

659 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 swiotlb.h

344 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 switch_to.h

2.89 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 syscall.h

2.06 KB

11/01/2022 04:52:05 PM

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Editing: spinlock.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_IA64_SPINLOCK_H
#define _ASM_IA64_SPINLOCK_H

/*
 * Copyright (C) 1998-2003 Hewlett-Packard Co
 *	David Mosberger-Tang <davidm@hpl.hp.com>
 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
 *
 * This file is used for SMP configurations only.
 */

#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/bitops.h>

#include <linux/atomic.h>
#include <asm/intrinsics.h>
#include <asm/barrier.h>
#include <asm/processor.h>

#define arch_spin_lock_init(x)			((x)->lock = 0)

/*
 * Ticket locks are conceptually two parts, one indicating the current head of
 * the queue, and the other indicating the current tail. The lock is acquired
 * by atomically noting the tail and incrementing it by one (thus adding
 * ourself to the queue and noting our position), then waiting until the head
 * becomes equal to the the initial value of the tail.
 * The pad bits in the middle are used to prevent the next_ticket number
 * overflowing into the now_serving number.
 *
 *   31             17  16    15  14                    0
 *  +----------------------------------------------------+
 *  |  now_serving     | padding |   next_ticket         |
 *  +----------------------------------------------------+
 */

#define TICKET_SHIFT	17
#define TICKET_BITS	15
#define	TICKET_MASK	((1 << TICKET_BITS) - 1)

static __always_inline void __ticket_spin_lock(arch_spinlock_t *lock)
{
	int	*p = (int *)&lock->lock, ticket, serve;

ticket = ia64_fetchadd(1, p, acq);

if (!(((ticket >> TICKET_SHIFT) ^ ticket) & TICKET_MASK))
		return;

ia64_invala();

for (;;) {
		asm volatile ("ld4.c.nc %0=[%1]" : "=r"(serve) : "r"(p) : "memory");

if (!(((serve >> TICKET_SHIFT) ^ ticket) & TICKET_MASK))
			return;
		cpu_relax();
	}
}

static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock)
{
	int tmp = READ_ONCE(lock->lock);

if (!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK))
		return ia64_cmpxchg(acq, &lock->lock, tmp, tmp + 1, sizeof (tmp)) == tmp;
	return 0;
}

static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock)
{
	unsigned short	*p = (unsigned short *)&lock->lock + 1, tmp;

asm volatile ("ld2.bias %0=[%1]" : "=r"(tmp) : "r"(p));
	WRITE_ONCE(*p, (tmp + 2) & ~1);
}

static inline int __ticket_spin_is_locked(arch_spinlock_t *lock)
{
	long tmp = READ_ONCE(lock->lock);

return !!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK);
}

static inline int __ticket_spin_is_contended(arch_spinlock_t *lock)
{
	long tmp = READ_ONCE(lock->lock);

return ((tmp - (tmp >> TICKET_SHIFT)) & TICKET_MASK) > 1;
}

static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
{
	return !(((lock.lock >> TICKET_SHIFT) ^ lock.lock) & TICKET_MASK);
}

static inline int arch_spin_is_locked(arch_spinlock_t *lock)
{
	return __ticket_spin_is_locked(lock);
}

static inline int arch_spin_is_contended(arch_spinlock_t *lock)
{
	return __ticket_spin_is_contended(lock);
}
#define arch_spin_is_contended	arch_spin_is_contended

static __always_inline void arch_spin_lock(arch_spinlock_t *lock)
{
	__ticket_spin_lock(lock);
}

static __always_inline int arch_spin_trylock(arch_spinlock_t *lock)
{
	return __ticket_spin_trylock(lock);
}

static __always_inline void arch_spin_unlock(arch_spinlock_t *lock)
{
	__ticket_spin_unlock(lock);
}

static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock,
						  unsigned long flags)
{
	arch_spin_lock(lock);
}
#define arch_spin_lock_flags	arch_spin_lock_flags

#ifdef ASM_SUPPORTED

static __always_inline void
arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags)
{
	__asm__ __volatile__ (
		"tbit.nz p6, p0 = %1,%2\n"
		"br.few 3f\n"
		"1:\n"
		"fetchadd4.rel r2 = [%0], -1;;\n"
		"(p6) ssm psr.i\n"
		"2:\n"
		"hint @pause\n"
		"ld4 r2 = [%0];;\n"
		"cmp4.lt p7,p0 = r2, r0\n"
		"(p7) br.cond.spnt.few 2b\n"
		"(p6) rsm psr.i\n"
		";;\n"
		"3:\n"
		"fetchadd4.acq r2 = [%0], 1;;\n"
		"cmp4.lt p7,p0 = r2, r0\n"
		"(p7) br.cond.spnt.few 1b\n"
		: : "r"(lock), "r"(flags), "i"(IA64_PSR_I_BIT)
		: "p6", "p7", "r2", "memory");
}

#define arch_read_lock_flags arch_read_lock_flags
#define arch_read_lock(lock) arch_read_lock_flags(lock, 0)

#else /* !ASM_SUPPORTED */

#define arch_read_lock_flags(rw, flags) arch_read_lock(rw)

#define arch_read_lock(rw)								\
do {											\
	arch_rwlock_t *__read_lock_ptr = (rw);						\
											\
	while (unlikely(ia64_fetchadd(1, (int *) __read_lock_ptr, acq) < 0)) {		\
		ia64_fetchadd(-1, (int *) __read_lock_ptr, rel);			\
		while (*(volatile int *)__read_lock_ptr < 0)				\
			cpu_relax();							\
	}										\
} while (0)

#endif /* !ASM_SUPPORTED */

#define arch_read_unlock(rw)					\
do {								\
	arch_rwlock_t *__read_lock_ptr = (rw);			\
	ia64_fetchadd(-1, (int *) __read_lock_ptr, rel);	\
} while (0)

#ifdef ASM_SUPPORTED

static __always_inline void
arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags)
{
	__asm__ __volatile__ (
		"tbit.nz p6, p0 = %1, %2\n"
		"mov ar.ccv = r0\n"
		"dep r29 = -1, r0, 31, 1\n"
		"br.few 3f;;\n"
		"1:\n"
		"(p6) ssm psr.i\n"
		"2:\n"
		"hint @pause\n"
		"ld4 r2 = [%0];;\n"
		"cmp4.eq p0,p7 = r0, r2\n"
		"(p7) br.cond.spnt.few 2b\n"
		"(p6) rsm psr.i\n"
		";;\n"
		"3:\n"
		"cmpxchg4.acq r2 = [%0], r29, ar.ccv;;\n"
		"cmp4.eq p0,p7 = r0, r2\n"
		"(p7) br.cond.spnt.few 1b;;\n"
		: : "r"(lock), "r"(flags), "i"(IA64_PSR_I_BIT)
		: "ar.ccv", "p6", "p7", "r2", "r29", "memory");
}

#define arch_write_lock_flags arch_write_lock_flags
#define arch_write_lock(rw) arch_write_lock_flags(rw, 0)

#define arch_write_trylock(rw)							\
({										\
	register long result;							\
										\
	__asm__ __volatile__ (							\
		"mov ar.ccv = r0\n"						\
		"dep r29 = -1, r0, 31, 1;;\n"					\
		"cmpxchg4.acq %0 = [%1], r29, ar.ccv\n"				\
		: "=r"(result) : "r"(rw) : "ar.ccv", "r29", "memory");		\
	(result == 0);								\
})

static inline void arch_write_unlock(arch_rwlock_t *x)
{
	u8 *y = (u8 *)x;
	barrier();
	asm volatile ("st1.rel.nta [%0] = r0\n\t" :: "r"(y+3) : "memory" );
}

#else /* !ASM_SUPPORTED */

#define arch_write_lock(l)								\
({											\
	__u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1);			\
	__u32 *ia64_write_lock_ptr = (__u32 *) (l);					\
	do {										\
		while (*ia64_write_lock_ptr)						\
			ia64_barrier();							\
		ia64_val = ia64_cmpxchg4_acq(ia64_write_lock_ptr, ia64_set_val, 0);	\
	} while (ia64_val);								\
})

#define arch_write_trylock(rw)						\
({									\
	__u64 ia64_val;							\
	__u64 ia64_set_val = ia64_dep_mi(-1, 0, 31,1);			\
	ia64_val = ia64_cmpxchg4_acq((__u32 *)(rw), ia64_set_val, 0);	\
	(ia64_val == 0);						\
})

static inline void arch_write_unlock(arch_rwlock_t *x)
{
	barrier();
	x->write_lock = 0;
}

#endif /* !ASM_SUPPORTED */

static inline int arch_read_trylock(arch_rwlock_t *x)
{
	union {
		arch_rwlock_t lock;
		__u32 word;
	} old, new;
	old.lock = new.lock = *x;
	old.lock.write_lock = new.lock.write_lock = 0;
	++new.lock.read_counter;
	return (u32)ia64_cmpxchg4_acq((__u32 *)(x), new.word, old.word) == old.word;
}

#endif /*  _ASM_IA64_SPINLOCK_H */