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05/09/2024 07:14:13 AM
rwxr-xr-x
📄
Kbuild
491 bytes
06/16/2023 05:32:39 PM
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agp.h
434 bytes
01/28/2018 09:20:33 PM
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apb.h
1.06 KB
01/28/2018 09:20:33 PM
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asm-offsets.h
35 bytes
01/28/2018 09:20:33 PM
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asm-prototypes.h
727 bytes
01/28/2018 09:20:33 PM
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asm.h
1.08 KB
01/28/2018 09:20:33 PM
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asmmacro.h
1.16 KB
01/28/2018 09:20:33 PM
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atomic.h
219 bytes
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atomic_32.h
2.26 KB
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atomic_64.h
3.34 KB
06/16/2023 05:32:39 PM
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auxio.h
310 bytes
01/28/2018 09:20:33 PM
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auxio_32.h
2.55 KB
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auxio_64.h
3.18 KB
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backoff.h
2.7 KB
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barrier.h
223 bytes
01/28/2018 09:20:33 PM
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barrier_32.h
160 bytes
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barrier_64.h
1.96 KB
01/28/2018 09:20:33 PM
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bbc.h
9.76 KB
01/28/2018 09:20:33 PM
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bitext.h
631 bytes
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bitops.h
219 bytes
01/28/2018 09:20:33 PM
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bitops_32.h
2.79 KB
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bitops_64.h
1.64 KB
01/28/2018 09:20:33 PM
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btext.h
145 bytes
01/28/2018 09:20:33 PM
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bug.h
588 bytes
06/16/2023 05:32:39 PM
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bugs.h
404 bytes
01/28/2018 09:20:33 PM
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cache.h
649 bytes
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cacheflush.h
373 bytes
01/28/2018 09:20:33 PM
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cacheflush_32.h
1.97 KB
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cacheflush_64.h
2.56 KB
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cachetlb_32.h
882 bytes
01/28/2018 09:20:33 PM
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chafsr.h
9.48 KB
01/28/2018 09:20:33 PM
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checksum.h
227 bytes
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checksum_32.h
6.81 KB
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checksum_64.h
4.4 KB
01/28/2018 09:20:33 PM
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chmctrl.h
7.91 KB
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clock.h
231 bytes
01/28/2018 09:20:33 PM
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clocksource.h
407 bytes
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cmpxchg.h
223 bytes
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cmpxchg_32.h
2.4 KB
01/28/2018 09:20:33 PM
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cmpxchg_64.h
5.13 KB
06/16/2023 05:32:39 PM
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compat.h
6.45 KB
01/28/2018 09:20:33 PM
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compat_signal.h
565 bytes
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contregs.h
1.9 KB
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cpu_type.h
579 bytes
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cpudata.h
378 bytes
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cpudata_32.h
729 bytes
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cpudata_64.h
1.13 KB
06/16/2023 05:32:39 PM
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current.h
991 bytes
01/28/2018 09:20:33 PM
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dcr.h
728 bytes
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dcu.h
1.48 KB
01/28/2018 09:20:33 PM
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delay.h
215 bytes
01/28/2018 09:20:33 PM
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delay_32.h
907 bytes
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delay_64.h
403 bytes
01/28/2018 09:20:33 PM
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device.h
565 bytes
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dma-mapping.h
632 bytes
01/28/2018 09:20:33 PM
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dma.h
6.6 KB
01/28/2018 09:20:33 PM
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ebus_dma.h
1.07 KB
01/28/2018 09:20:33 PM
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ecc.h
4.34 KB
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eeprom.h
254 bytes
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elf.h
207 bytes
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elf_32.h
3.19 KB
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elf_64.h
6.47 KB
01/28/2018 09:20:33 PM
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estate.h
2.23 KB
01/28/2018 09:20:33 PM
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extable_64.h
727 bytes
01/28/2018 09:20:33 PM
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fb.h
680 bytes
01/28/2018 09:20:33 PM
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fbio.h
2.26 KB
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fhc.h
4.43 KB
01/28/2018 09:20:33 PM
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floppy.h
219 bytes
01/28/2018 09:20:33 PM
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floppy_32.h
9.74 KB
01/28/2018 09:20:33 PM
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floppy_64.h
18.83 KB
01/28/2018 09:20:33 PM
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fpumacro.h
710 bytes
01/28/2018 09:20:33 PM
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ftrace.h
800 bytes
01/28/2018 09:20:33 PM
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futex.h
215 bytes
01/28/2018 09:20:33 PM
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📄
futex_32.h
82 bytes
01/28/2018 09:20:33 PM
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futex_64.h
2.15 KB
01/28/2018 09:20:33 PM
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hardirq.h
223 bytes
01/28/2018 09:20:33 PM
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hardirq_32.h
334 bytes
01/28/2018 09:20:33 PM
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hardirq_64.h
417 bytes
01/28/2018 09:20:33 PM
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head.h
211 bytes
01/28/2018 09:20:33 PM
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head_32.h
2.56 KB
01/28/2018 09:20:33 PM
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head_64.h
2.13 KB
01/28/2018 09:20:33 PM
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hibernate.h
421 bytes
01/28/2018 09:20:33 PM
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highmem.h
2.02 KB
01/28/2018 09:20:33 PM
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hugetlb.h
2.09 KB
01/28/2018 09:20:33 PM
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hvtramp.h
782 bytes
01/28/2018 09:20:33 PM
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hw_irq.h
88 bytes
01/28/2018 09:20:33 PM
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hypervisor.h
110.71 KB
01/28/2018 09:20:33 PM
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📄
ide.h
2.19 KB
01/28/2018 09:20:33 PM
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📄
idprom.h
656 bytes
01/28/2018 09:20:33 PM
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📄
intr_queue.h
794 bytes
01/28/2018 09:20:33 PM
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📄
io-unit.h
2.41 KB
01/28/2018 09:20:33 PM
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📄
io.h
620 bytes
01/28/2018 09:20:33 PM
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io_32.h
3.51 KB
01/28/2018 09:20:33 PM
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io_64.h
10.66 KB
06/16/2023 05:32:39 PM
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📄
ioctls.h
358 bytes
01/28/2018 09:20:33 PM
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iommu.h
215 bytes
01/28/2018 09:20:33 PM
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📄
iommu_32.h
5.73 KB
01/28/2018 09:20:33 PM
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iommu_64.h
2.43 KB
01/28/2018 09:20:33 PM
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📄
irq.h
207 bytes
01/28/2018 09:20:33 PM
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📄
irq_32.h
526 bytes
01/28/2018 09:20:33 PM
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irq_64.h
3.06 KB
01/28/2018 09:20:33 PM
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irqflags.h
227 bytes
01/28/2018 09:20:33 PM
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📄
irqflags_32.h
1.03 KB
01/28/2018 09:20:33 PM
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irqflags_64.h
1.91 KB
01/28/2018 09:20:33 PM
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jump_label.h
1.01 KB
01/28/2018 09:20:33 PM
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kdebug.h
219 bytes
01/28/2018 09:20:33 PM
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kdebug_32.h
1.99 KB
01/28/2018 09:20:33 PM
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kdebug_64.h
393 bytes
01/28/2018 09:20:33 PM
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📄
kgdb.h
1014 bytes
01/28/2018 09:20:33 PM
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kmap_types.h
233 bytes
01/28/2018 09:20:33 PM
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kprobes.h
1.41 KB
01/28/2018 09:20:33 PM
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ldc.h
4.37 KB
01/28/2018 09:20:33 PM
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leon.h
7.37 KB
01/28/2018 09:20:33 PM
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📄
leon_amba.h
8.09 KB
01/28/2018 09:20:33 PM
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leon_pci.h
512 bytes
01/28/2018 09:20:33 PM
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lsu.h
1.04 KB
01/28/2018 09:20:33 PM
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📄
machines.h
1.5 KB
01/28/2018 09:20:33 PM
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mbus.h
2.93 KB
01/28/2018 09:20:33 PM
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mc146818rtc.h
298 bytes
01/28/2018 09:20:33 PM
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mc146818rtc_32.h
699 bytes
01/28/2018 09:20:33 PM
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mc146818rtc_64.h
689 bytes
01/28/2018 09:20:33 PM
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mdesc.h
2.99 KB
01/28/2018 09:20:33 PM
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memctrl.h
311 bytes
01/28/2018 09:20:33 PM
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mman.h
304 bytes
01/28/2018 09:20:33 PM
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mmu.h
207 bytes
01/28/2018 09:20:33 PM
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mmu_32.h
209 bytes
01/28/2018 09:20:33 PM
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mmu_64.h
3.14 KB
01/28/2018 09:20:33 PM
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📄
mmu_context.h
239 bytes
01/28/2018 09:20:33 PM
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mmu_context_32.h
1.07 KB
01/28/2018 09:20:33 PM
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mmu_context_64.h
4.15 KB
01/28/2018 09:20:33 PM
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mmzone.h
393 bytes
01/28/2018 09:20:33 PM
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msi.h
774 bytes
01/28/2018 09:20:33 PM
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mxcc.h
4.33 KB
01/28/2018 09:20:33 PM
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nmi.h
354 bytes
01/28/2018 09:20:33 PM
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ns87303.h
3.22 KB
01/28/2018 09:20:33 PM
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obio.h
6.26 KB
01/28/2018 09:20:33 PM
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openprom.h
7.3 KB
01/28/2018 09:20:33 PM
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oplib.h
215 bytes
01/28/2018 09:20:33 PM
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oplib_32.h
5.92 KB
01/28/2018 09:20:33 PM
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oplib_64.h
8.12 KB
01/28/2018 09:20:33 PM
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page.h
274 bytes
01/28/2018 09:20:33 PM
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page_32.h
3.91 KB
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page_64.h
4.49 KB
01/28/2018 09:20:33 PM
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parport.h
5.68 KB
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pbm.h
1.47 KB
01/28/2018 09:20:33 PM
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pci.h
207 bytes
01/28/2018 09:20:33 PM
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pci_32.h
1.09 KB
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pci_64.h
1.49 KB
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pcic.h
5.77 KB
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pcr.h
1.85 KB
01/28/2018 09:20:33 PM
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percpu.h
219 bytes
01/28/2018 09:20:33 PM
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percpu_32.h
168 bytes
01/28/2018 09:20:33 PM
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percpu_64.h
515 bytes
01/28/2018 09:20:33 PM
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perf_event.h
802 bytes
01/28/2018 09:20:33 PM
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pgalloc.h
223 bytes
01/28/2018 09:20:33 PM
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pgalloc_32.h
1.91 KB
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pgalloc_64.h
2.85 KB
01/28/2018 09:20:33 PM
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pgtable.h
223 bytes
01/28/2018 09:20:33 PM
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pgtable_32.h
11.35 KB
01/28/2018 09:20:33 PM
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pgtable_64.h
30.71 KB
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pgtsrmmu.h
6.05 KB
01/28/2018 09:20:33 PM
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pil.h
1.08 KB
01/28/2018 09:20:33 PM
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processor.h
231 bytes
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processor_32.h
3.13 KB
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processor_64.h
7.58 KB
01/28/2018 09:20:33 PM
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prom.h
2.02 KB
01/28/2018 09:20:33 PM
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psr.h
1.38 KB
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ptrace.h
4.19 KB
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qrwlock.h
205 bytes
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qspinlock.h
215 bytes
01/28/2018 09:20:33 PM
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ross.h
5.52 KB
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sbi.h
3.34 KB
01/28/2018 09:20:33 PM
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scratchpad.h
547 bytes
01/28/2018 09:20:33 PM
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seccomp.h
225 bytes
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sections.h
289 bytes
01/28/2018 09:20:33 PM
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setup.h
1.52 KB
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sfafsr.h
3.14 KB
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sfp-machine.h
239 bytes
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sfp-machine_32.h
6.79 KB
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sfp-machine_64.h
3.1 KB
01/28/2018 09:20:33 PM
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shmparam.h
227 bytes
01/28/2018 09:20:33 PM
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shmparam_32.h
253 bytes
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shmparam_64.h
306 bytes
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sigcontext.h
2.55 KB
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signal.h
835 bytes
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smp.h
207 bytes
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smp_32.h
3.29 KB
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smp_64.h
1.84 KB
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sparsemem.h
349 bytes
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spinlock.h
227 bytes
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spinlock_32.h
4.22 KB
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spinlock_64.h
409 bytes
01/28/2018 09:20:33 PM
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spinlock_types.h
549 bytes
01/28/2018 09:20:33 PM
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spitfire.h
9.73 KB
01/28/2018 09:20:33 PM
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stacktrace.h
166 bytes
01/28/2018 09:20:33 PM
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starfire.h
418 bytes
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string.h
1.13 KB
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string_32.h
405 bytes
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string_64.h
505 bytes
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sunbpp.h
3.27 KB
01/28/2018 09:20:33 PM
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swift.h
3.07 KB
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switch_to.h
231 bytes
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switch_to_32.h
3.53 KB
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switch_to_64.h
2.58 KB
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syscall.h
3.41 KB
01/28/2018 09:20:33 PM
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syscalls.h
307 bytes
01/28/2018 09:20:33 PM
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termbits.h
198 bytes
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termios.h
4.94 KB
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thread_info.h
239 bytes
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thread_info_32.h
3.66 KB
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thread_info_64.h
7.84 KB
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timer.h
215 bytes
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Editing: viking.h
Close
/* SPDX-License-Identifier: GPL-2.0 */ /* * viking.h: Defines specific to the GNU/Viking MBUS module. * This is SRMMU stuff. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) */ #ifndef _SPARC_VIKING_H #define _SPARC_VIKING_H #include <asm/asi.h> #include <asm/mxcc.h> #include <asm/pgtsrmmu.h> /* Bits in the SRMMU control register for GNU/Viking modules. * * ----------------------------------------------------------- * |impl-vers| RSV |TC|AC|SP|BM|PC|MBM|SB|IC|DC|PSO|RSV|NF|ME| * ----------------------------------------------------------- * 31 24 23-17 16 15 14 13 12 11 10 9 8 7 6-2 1 0 * * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache * 1 = Twalks are cacheable in E-cache * * GNU/Viking will only cache tablewalks in the E-cache (mxcc) if present * and never caches them internally (or so states the docs). Therefore * for machines lacking an E-cache (ie. in MBUS mode) this bit must * remain cleared. * * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable * 1 = Passthru physical accesses cacheable * * This indicates whether accesses are cacheable when no cachable bit * is present in the pte when the processor is in boot-mode or the * access does not need pte's for translation (ie. pass-thru ASI's). * "Cachable" is only referring to E-cache (if present) and not the * on chip split I/D caches of the GNU/Viking. * * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on * * This enables snooping on the GNU/Viking bus. This must be on * for the hardware cache consistency mechanisms of the GNU/Viking * to work at all. On non-mxcc GNU/Viking modules the split I/D * caches will snoop regardless of whether they are enabled, this * takes care of the case where the I or D or both caches are turned * off yet still contain valid data. Note also that this bit does * not affect GNU/Viking store-buffer snoops, those happen if the * store-buffer is enabled no matter what. * * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode * * This indicates whether the GNU/Viking is in boot-mode or not, * if it is then all instruction fetch physical addresses are * computed as 0xff0000000 + low 28 bits of requested address. * GNU/Viking boot-mode does not affect data accesses. Also, * in boot mode instruction accesses bypass the split on chip I/D * caches, they may be cached by the GNU/MXCC if present and enabled. * * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode * * This indicated the GNU/Viking configuration present. If in * MBUS mode, the GNU/Viking lacks a GNU/MXCC E-cache. If it is * not then the GNU/Viking is on a module VBUS connected directly * to a GNU/MXCC cache controller. The GNU/MXCC can be thus connected * to either an GNU/MBUS (sun4m) or the packet-switched GNU/XBus (sun4d). * * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on * * The GNU/Viking store buffer allows the chip to continue execution * after a store even if the data cannot be placed in one of the * caches during that cycle. If disabled, all stores operations * occur synchronously. * * IC: Instruction Cache -- 0 = off, 1 = on * DC: Data Cache -- 0 = off, 1 = 0n * * These bits enable the on-cpu GNU/Viking split I/D caches. Note, * as mentioned above, these caches will snoop the bus in GNU/MBUS * configurations even when disabled to avoid data corruption. * * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating * */ #define VIKING_MMUENABLE 0x00000001 #define VIKING_NOFAULT 0x00000002 #define VIKING_PSO 0x00000080 #define VIKING_DCENABLE 0x00000100 /* Enable data cache */ #define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */ #define VIKING_SBENABLE 0x00000400 /* Enable store buffer */ #define VIKING_MMODE 0x00000800 /* MBUS mode */ #define VIKING_PCENABLE 0x00001000 /* Enable parity checking */ #define VIKING_BMODE 0x00002000 #define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */ #define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */ #define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */ #define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */ /* * GNU/Viking Breakpoint Action Register fields. */ #define VIKING_ACTION_MIX 0x00001000 /* Enable multiple instructions */ /* * GNU/Viking Cache Tags. */ #define VIKING_PTAG_VALID 0x01000000 /* Cache block is valid */ #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */ #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */ #ifndef __ASSEMBLY__ static inline void viking_flush_icache(void) { __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : /* no outputs */ : "i" (ASI_M_IC_FLCLEAR) : "memory"); } static inline void viking_flush_dcache(void) { __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : /* no outputs */ : "i" (ASI_M_DC_FLCLEAR) : "memory"); } static inline void viking_unlock_icache(void) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : /* no outputs */ : "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR) : "memory"); } static inline void viking_unlock_dcache(void) { __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : /* no outputs */ : "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR) : "memory"); } static inline void viking_set_bpreg(unsigned long regval) { __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : /* no outputs */ : "r" (regval), "i" (ASI_M_ACTION) : "memory"); } static inline unsigned long viking_get_bpreg(void) { unsigned long regval; __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : "=r" (regval) : "i" (ASI_M_ACTION)); return regval; } static inline void viking_get_dcache_ptag(int set, int block, unsigned long *data) { unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) | 0x80000000; unsigned long info, page; __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t" "or %%g0, %%g2, %0\n\t" "or %%g0, %%g3, %1\n\t" : "=r" (info), "=r" (page) : "r" (ptag), "i" (ASI_M_DATAC_TAG) : "g2", "g3"); data[0] = info; data[1] = page; } static inline void viking_mxcc_turn_off_parity(unsigned long *mregp, unsigned long *mxcc_cregp) { unsigned long mreg = *mregp; unsigned long mxcc_creg = *mxcc_cregp; mreg &= ~(VIKING_PCENABLE); mxcc_creg &= ~(MXCC_CTL_PARE); __asm__ __volatile__ ("set 1f, %%g2\n\t" "andcc %%g2, 4, %%g0\n\t" "bne 2f\n\t" " nop\n" "1:\n\t" "sta %0, [%%g0] %3\n\t" "sta %1, [%2] %4\n\t" "b 1f\n\t" " nop\n\t" "nop\n" "2:\n\t" "sta %0, [%%g0] %3\n\t" "sta %1, [%2] %4\n" "1:\n\t" : /* no output */ : "r" (mreg), "r" (mxcc_creg), "r" (MXCC_CREG), "i" (ASI_M_MMUREGS), "i" (ASI_M_MXCC) : "g2", "memory", "cc"); *mregp = mreg; *mxcc_cregp = mxcc_creg; } static inline unsigned long viking_hwprobe(unsigned long vaddr) { unsigned long val; vaddr &= PAGE_MASK; /* Probe all MMU entries. */ __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (val) : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); if (!val) return 0; /* Probe region. */ __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (val) : "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE)); if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { vaddr &= ~SRMMU_PGDIR_MASK; vaddr >>= PAGE_SHIFT; return val | (vaddr << 8); } /* Probe segment. */ __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (val) : "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE)); if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { vaddr &= ~SRMMU_REAL_PMD_MASK; vaddr >>= PAGE_SHIFT; return val | (vaddr << 8); } /* Probe page. */ __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (val) : "r" (vaddr), "i" (ASI_M_FLUSH_PROBE)); return val; } #endif /* !__ASSEMBLY__ */ #endif /* !(_SPARC_VIKING_H) */