OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:13 AM	rwxr-xr-x
📄 Kbuild	491 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 agp.h	434 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 apb.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	727 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm.h	1.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro.h	1.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	219 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic_32.h	2.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic_64.h	3.34 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 auxio.h	310 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 auxio_32.h	2.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 auxio_64.h	3.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 backoff.h	2.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier_32.h	160 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier_64.h	1.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bbc.h	9.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitext.h	631 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	219 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops_32.h	2.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops_64.h	1.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 btext.h	145 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	588 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 bugs.h	404 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	649 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	373 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush_32.h	1.97 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush_64.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cachetlb_32.h	882 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 chafsr.h	9.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum_32.h	6.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum_64.h	4.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 chmctrl.h	7.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clock.h	231 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	407 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg_32.h	2.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg_64.h	5.13 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 compat.h	6.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compat_signal.h	565 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 contregs.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu_type.h	579 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpudata.h	378 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpudata_32.h	729 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpudata_64.h	1.13 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 current.h	991 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dcr.h	728 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dcu.h	1.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay_32.h	907 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay_64.h	403 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	565 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	632 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	6.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ebus_dma.h	1.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ecc.h	4.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 eeprom.h	254 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf_32.h	3.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf_64.h	6.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 estate.h	2.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable_64.h	727 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	680 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fbio.h	2.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fhc.h	4.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	219 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy_32.h	9.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy_64.h	18.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpumacro.h	710 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	800 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex_32.h	82 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex_64.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq_32.h	334 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq_64.h	417 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 head.h	211 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 head_32.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 head_64.h	2.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hibernate.h	421 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 highmem.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	2.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hvtramp.h	782 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	88 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hypervisor.h	110.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	2.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 idprom.h	656 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intr_queue.h	794 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io-unit.h	2.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	620 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_32.h	3.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_64.h	10.66 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 ioctls.h	358 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu_32.h	5.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu_64.h	2.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_32.h	526 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_64.h	3.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags_32.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags_64.h	1.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	219 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug_32.h	1.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug_64.h	393 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	1014 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	233 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	1.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ldc.h	4.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 leon.h	7.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 leon_amba.h	8.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 leon_pci.h	512 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 lsu.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 machines.h	1.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mbus.h	2.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc.h	298 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc_32.h	699 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc_64.h	689 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mdesc.h	2.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 memctrl.h	311 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mman.h	304 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_32.h	209 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_64.h	3.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	239 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context_32.h	1.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context_64.h	4.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	393 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 msi.h	774 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mxcc.h	4.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 nmi.h	354 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ns87303.h	3.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 obio.h	6.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 openprom.h	7.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 oplib.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 oplib_32.h	5.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 oplib_64.h	8.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	274 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_32.h	3.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_64.h	4.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	5.68 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pbm.h	1.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci_32.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci_64.h	1.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pcic.h	5.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pcr.h	1.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	219 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu_32.h	168 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu_64.h	515 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	802 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc_32.h	1.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc_64.h	2.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable_32.h	11.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable_64.h	30.71 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtsrmmu.h	6.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pil.h	1.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	231 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor_32.h	3.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor_64.h	7.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 prom.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 psr.h	1.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	4.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 qrwlock.h	205 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 qspinlock.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ross.h	5.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sbi.h	3.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 scratchpad.h	547 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 seccomp.h	225 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	289 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	1.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfafsr.h	3.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfp-machine.h	239 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfp-machine_32.h	6.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfp-machine_64.h	3.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam_32.h	253 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam_64.h	306 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sigcontext.h	2.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	835 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_32.h	3.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_64.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	349 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_32.h	4.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_64.h	409 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	549 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spitfire.h	9.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	166 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 starfire.h	418 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string_32.h	405 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string_64.h	505 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sunbpp.h	3.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 swift.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	231 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to_32.h	3.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to_64.h	2.58 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 syscall.h	3.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls.h	307 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 termbits.h	198 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 termios.h	4.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	239 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info_32.h	3.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info_64.h	7.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timer.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 timer_32.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timer_64.h	2.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	215 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex_32.h	266 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 timex_64.h	423 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb_32.h	520 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb_64.h	913 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush_32.h	621 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush_64.h	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology_32.h	170 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology_64.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 trap_block.h	6.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	577 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tsb.h	12.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tsunami.h	1.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ttable.h	20.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 turbosparc.h	3.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	363 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess_32.h	8.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess_64.h	6.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	339 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	1.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 upa.h	3.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	1.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	102 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vaddrs.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vdso.h	662 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	964 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 viking.h	8.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vio.h	11.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 visasm.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vvar.h	1.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 winmacro.h	4.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor.h	207 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor_32.h	7.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor_64.h	2.5 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: io_64.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __SPARC64_IO_H
#define __SPARC64_IO_H

#include <linux/kernel.h>
#include <linux/compiler.h>
#include <linux/types.h>

#include <asm/page.h>      /* IO address mapping routines need this */
#include <asm/asi.h>
#include <asm-generic/pci_iomap.h>

/* BIO layer definitions. */
extern unsigned long kern_base, kern_size;

/* __raw_{read,write}{b,w,l,q} uses direct access.
 * Access the memory as big endian bypassing the cache
 * by using ASI_PHYS_BYPASS_EC_E
 */
#define __raw_readb __raw_readb
static inline u8 __raw_readb(const volatile void __iomem *addr)
{
	u8 ret;

__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));

return ret;
}

#define __raw_readw __raw_readw
static inline u16 __raw_readw(const volatile void __iomem *addr)
{
	u16 ret;

__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));

return ret;
}

#define __raw_readl __raw_readl
static inline u32 __raw_readl(const volatile void __iomem *addr)
{
	u32 ret;

__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));

return ret;
}

#define __raw_readq __raw_readq
static inline u64 __raw_readq(const volatile void __iomem *addr)
{
	u64 ret;

__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));

return ret;
}

#define __raw_writeb __raw_writeb
static inline void __raw_writeb(u8 b, const volatile void __iomem *addr)
{
	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
			     : /* no outputs */
			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}

#define __raw_writew __raw_writew
static inline void __raw_writew(u16 w, const volatile void __iomem *addr)
{
	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
			     : /* no outputs */
			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}

#define __raw_writel __raw_writel
static inline void __raw_writel(u32 l, const volatile void __iomem *addr)
{
	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
			     : /* no outputs */
			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}

#define __raw_writeq __raw_writeq
static inline void __raw_writeq(u64 q, const volatile void __iomem *addr)
{
	__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
			     : /* no outputs */
			     : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}

/* Memory functions, same as I/O accesses on Ultra.
 * Access memory as little endian bypassing
 * the cache by using ASI_PHYS_BYPASS_EC_E_L
 */
#define readb readb
#define readb_relaxed readb
static inline u8 readb(const volatile void __iomem *addr)
{	u8 ret;

__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	return ret;
}

#define readw readw
#define readw_relaxed readw
static inline u16 readw(const volatile void __iomem *addr)
{	u16 ret;

__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");

return ret;
}

#define readl readl
#define readl_relaxed readl
static inline u32 readl(const volatile void __iomem *addr)
{	u32 ret;

__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");

return ret;
}

#define readq readq
#define readq_relaxed readq
static inline u64 readq(const volatile void __iomem *addr)
{	u64 ret;

__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
			     : "=r" (ret)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");

return ret;
}

#define writeb writeb
#define writeb_relaxed writeb
static inline void writeb(u8 b, volatile void __iomem *addr)
{
	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
			     : /* no outputs */
			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
}

#define writew writew
#define writew_relaxed writew
static inline void writew(u16 w, volatile void __iomem *addr)
{
	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
			     : /* no outputs */
			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
}

#define writel writel
#define writel_relaxed writel
static inline void writel(u32 l, volatile void __iomem *addr)
{
	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
			     : /* no outputs */
			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
}

#define writeq writeq
#define writeq_relaxed writeq
static inline void writeq(u64 q, volatile void __iomem *addr)
{
	__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
			     : /* no outputs */
			     : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
}

#define inb inb
static inline u8 inb(unsigned long addr)
{
	return readb((volatile void __iomem *)addr);
}

#define inw inw
static inline u16 inw(unsigned long addr)
{
	return readw((volatile void __iomem *)addr);
}

#define inl inl
static inline u32 inl(unsigned long addr)
{
	return readl((volatile void __iomem *)addr);
}

#define outb outb
static inline void outb(u8 b, unsigned long addr)
{
	writeb(b, (volatile void __iomem *)addr);
}

#define outw outw
static inline void outw(u16 w, unsigned long addr)
{
	writew(w, (volatile void __iomem *)addr);
}

#define outl outl
static inline void outl(u32 l, unsigned long addr)
{
	writel(l, (volatile void __iomem *)addr);
}

#define inb_p(__addr) 		inb(__addr)
#define outb_p(__b, __addr)	outb(__b, __addr)
#define inw_p(__addr)		inw(__addr)
#define outw_p(__w, __addr)	outw(__w, __addr)
#define inl_p(__addr)		inl(__addr)
#define outl_p(__l, __addr)	outl(__l, __addr)

void outsb(unsigned long, const void *, unsigned long);
void outsw(unsigned long, const void *, unsigned long);
void outsl(unsigned long, const void *, unsigned long);
void insb(unsigned long, void *, unsigned long);
void insw(unsigned long, void *, unsigned long);
void insl(unsigned long, void *, unsigned long);

static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
{
	insb((unsigned long __force)port, buf, count);
}
static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
{
	insw((unsigned long __force)port, buf, count);
}

static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
{
	insl((unsigned long __force)port, buf, count);
}

static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
{
	outsb((unsigned long __force)port, buf, count);
}

static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
{
	outsw((unsigned long __force)port, buf, count);
}

static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
{
	outsl((unsigned long __force)port, buf, count);
}

/* Valid I/O Space regions are anywhere, because each PCI bus supported
 * can live in an arbitrary area of the physical address range.
 */
#define IO_SPACE_LIMIT 0xffffffffffffffffUL

/* Now, SBUS variants, only difference from PCI is that we do
 * not use little-endian ASIs.
 */
static inline u8 sbus_readb(const volatile void __iomem *addr)
{
	return __raw_readb(addr);
}

static inline u16 sbus_readw(const volatile void __iomem *addr)
{
	return __raw_readw(addr);
}

static inline u32 sbus_readl(const volatile void __iomem *addr)
{
	return __raw_readl(addr);
}

static inline u64 sbus_readq(const volatile void __iomem *addr)
{
	return __raw_readq(addr);
}

static inline void sbus_writeb(u8 b, volatile void __iomem *addr)
{
	__raw_writeb(b, addr);
}

static inline void sbus_writew(u16 w, volatile void __iomem *addr)
{
	__raw_writew(w, addr);
}

static inline void sbus_writel(u32 l, volatile void __iomem *addr)
{
	__raw_writel(l, addr);
}

static inline void sbus_writeq(u64 q, volatile void __iomem *addr)
{
	__raw_writeq(q, addr);
}

static inline void sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
{
	while(n--) {
		sbus_writeb(c, dst);
		dst++;
	}
}

static inline void memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
{
	volatile void __iomem *d = dst;

while (n--) {
		writeb(c, d);
		d++;
	}
}

static inline void sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
				      __kernel_size_t n)
{
	char *d = dst;

while (n--) {
		char tmp = sbus_readb(src);
		*d++ = tmp;
		src++;
	}
}

static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
				 __kernel_size_t n)
{
	char *d = dst;

while (n--) {
		char tmp = readb(src);
		*d++ = tmp;
		src++;
	}
}

static inline void sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
				    __kernel_size_t n)
{
	const char *s = src;
	volatile void __iomem *d = dst;

while (n--) {
		char tmp = *s++;
		sbus_writeb(tmp, d);
		d++;
	}
}

static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
			       __kernel_size_t n)
{
	const char *s = src;
	volatile void __iomem *d = dst;

while (n--) {
		char tmp = *s++;
		writeb(tmp, d);
		d++;
	}
}

#define mmiowb()

#ifdef __KERNEL__

/* On sparc64 we have the whole physical IO address space accessible
 * using physically addressed loads and stores, so this does nothing.
 */
static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
{
	return (void __iomem *)offset;
}

#define ioremap_nocache(X,Y)		ioremap((X),(Y))
#define ioremap_uc(X,Y)			ioremap((X),(Y))
#define ioremap_wc(X,Y)			ioremap((X),(Y))
#define ioremap_wt(X,Y)			ioremap((X),(Y))

static inline void iounmap(volatile void __iomem *addr)
{
}

#define ioread8			readb
#define ioread16		readw
#define ioread16be		__raw_readw
#define ioread32		readl
#define ioread32be		__raw_readl
#define iowrite8		writeb
#define iowrite16		writew
#define iowrite16be		__raw_writew
#define iowrite32		writel
#define iowrite32be		__raw_writel

/* Create a virtual mapping cookie for an IO port range */
void __iomem *ioport_map(unsigned long port, unsigned int nr);
void ioport_unmap(void __iomem *);

/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
void pci_iounmap(struct pci_dev *dev, void __iomem *);

static inline int sbus_can_dma_64bit(void)
{
	return 1;
}
static inline int sbus_can_burst64(void)
{
	return 1;
}
struct device;
void sbus_set_sbus64(struct device *, int);

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

#endif

#endif /* !(__SPARC64_IO_H) */