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05/09/2024 07:14:13 AM
rwxr-xr-x
📄
Kbuild
491 bytes
06/16/2023 05:32:39 PM
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agp.h
434 bytes
01/28/2018 09:20:33 PM
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apb.h
1.06 KB
01/28/2018 09:20:33 PM
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asm-offsets.h
35 bytes
01/28/2018 09:20:33 PM
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asm-prototypes.h
727 bytes
01/28/2018 09:20:33 PM
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asm.h
1.08 KB
01/28/2018 09:20:33 PM
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asmmacro.h
1.16 KB
01/28/2018 09:20:33 PM
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atomic.h
219 bytes
01/28/2018 09:20:33 PM
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atomic_32.h
2.26 KB
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atomic_64.h
3.34 KB
06/16/2023 05:32:39 PM
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auxio.h
310 bytes
01/28/2018 09:20:33 PM
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auxio_32.h
2.55 KB
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auxio_64.h
3.18 KB
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backoff.h
2.7 KB
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barrier.h
223 bytes
01/28/2018 09:20:33 PM
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barrier_32.h
160 bytes
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barrier_64.h
1.96 KB
01/28/2018 09:20:33 PM
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bbc.h
9.76 KB
01/28/2018 09:20:33 PM
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bitext.h
631 bytes
01/28/2018 09:20:33 PM
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bitops.h
219 bytes
01/28/2018 09:20:33 PM
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bitops_32.h
2.79 KB
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bitops_64.h
1.64 KB
01/28/2018 09:20:33 PM
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btext.h
145 bytes
01/28/2018 09:20:33 PM
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bug.h
588 bytes
06/16/2023 05:32:39 PM
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bugs.h
404 bytes
01/28/2018 09:20:33 PM
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cache.h
649 bytes
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cacheflush.h
373 bytes
01/28/2018 09:20:33 PM
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cacheflush_32.h
1.97 KB
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cacheflush_64.h
2.56 KB
01/28/2018 09:20:33 PM
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cachetlb_32.h
882 bytes
01/28/2018 09:20:33 PM
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chafsr.h
9.48 KB
01/28/2018 09:20:33 PM
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checksum.h
227 bytes
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checksum_32.h
6.81 KB
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checksum_64.h
4.4 KB
01/28/2018 09:20:33 PM
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chmctrl.h
7.91 KB
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clock.h
231 bytes
01/28/2018 09:20:33 PM
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clocksource.h
407 bytes
01/28/2018 09:20:33 PM
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cmpxchg.h
223 bytes
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cmpxchg_32.h
2.4 KB
01/28/2018 09:20:33 PM
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cmpxchg_64.h
5.13 KB
06/16/2023 05:32:39 PM
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compat.h
6.45 KB
01/28/2018 09:20:33 PM
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compat_signal.h
565 bytes
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contregs.h
1.9 KB
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cpu_type.h
579 bytes
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cpudata.h
378 bytes
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cpudata_32.h
729 bytes
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cpudata_64.h
1.13 KB
06/16/2023 05:32:39 PM
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current.h
991 bytes
01/28/2018 09:20:33 PM
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dcr.h
728 bytes
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dcu.h
1.48 KB
01/28/2018 09:20:33 PM
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delay.h
215 bytes
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delay_32.h
907 bytes
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delay_64.h
403 bytes
01/28/2018 09:20:33 PM
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device.h
565 bytes
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dma-mapping.h
632 bytes
01/28/2018 09:20:33 PM
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dma.h
6.6 KB
01/28/2018 09:20:33 PM
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ebus_dma.h
1.07 KB
01/28/2018 09:20:33 PM
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ecc.h
4.34 KB
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eeprom.h
254 bytes
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elf.h
207 bytes
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elf_32.h
3.19 KB
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elf_64.h
6.47 KB
01/28/2018 09:20:33 PM
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estate.h
2.23 KB
01/28/2018 09:20:33 PM
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extable_64.h
727 bytes
01/28/2018 09:20:33 PM
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fb.h
680 bytes
01/28/2018 09:20:33 PM
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fbio.h
2.26 KB
01/28/2018 09:20:33 PM
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fhc.h
4.43 KB
01/28/2018 09:20:33 PM
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floppy.h
219 bytes
01/28/2018 09:20:33 PM
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floppy_32.h
9.74 KB
01/28/2018 09:20:33 PM
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floppy_64.h
18.83 KB
01/28/2018 09:20:33 PM
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fpumacro.h
710 bytes
01/28/2018 09:20:33 PM
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ftrace.h
800 bytes
01/28/2018 09:20:33 PM
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futex.h
215 bytes
01/28/2018 09:20:33 PM
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📄
futex_32.h
82 bytes
01/28/2018 09:20:33 PM
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futex_64.h
2.15 KB
01/28/2018 09:20:33 PM
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hardirq.h
223 bytes
01/28/2018 09:20:33 PM
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📄
hardirq_32.h
334 bytes
01/28/2018 09:20:33 PM
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hardirq_64.h
417 bytes
01/28/2018 09:20:33 PM
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head.h
211 bytes
01/28/2018 09:20:33 PM
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head_32.h
2.56 KB
01/28/2018 09:20:33 PM
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head_64.h
2.13 KB
01/28/2018 09:20:33 PM
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hibernate.h
421 bytes
01/28/2018 09:20:33 PM
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highmem.h
2.02 KB
01/28/2018 09:20:33 PM
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hugetlb.h
2.09 KB
01/28/2018 09:20:33 PM
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hvtramp.h
782 bytes
01/28/2018 09:20:33 PM
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hw_irq.h
88 bytes
01/28/2018 09:20:33 PM
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hypervisor.h
110.71 KB
01/28/2018 09:20:33 PM
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📄
ide.h
2.19 KB
01/28/2018 09:20:33 PM
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📄
idprom.h
656 bytes
01/28/2018 09:20:33 PM
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📄
intr_queue.h
794 bytes
01/28/2018 09:20:33 PM
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📄
io-unit.h
2.41 KB
01/28/2018 09:20:33 PM
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📄
io.h
620 bytes
01/28/2018 09:20:33 PM
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io_32.h
3.51 KB
01/28/2018 09:20:33 PM
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io_64.h
10.66 KB
06/16/2023 05:32:39 PM
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📄
ioctls.h
358 bytes
01/28/2018 09:20:33 PM
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iommu.h
215 bytes
01/28/2018 09:20:33 PM
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📄
iommu_32.h
5.73 KB
01/28/2018 09:20:33 PM
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iommu_64.h
2.43 KB
01/28/2018 09:20:33 PM
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📄
irq.h
207 bytes
01/28/2018 09:20:33 PM
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📄
irq_32.h
526 bytes
01/28/2018 09:20:33 PM
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irq_64.h
3.06 KB
01/28/2018 09:20:33 PM
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irqflags.h
227 bytes
01/28/2018 09:20:33 PM
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📄
irqflags_32.h
1.03 KB
01/28/2018 09:20:33 PM
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irqflags_64.h
1.91 KB
01/28/2018 09:20:33 PM
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jump_label.h
1.01 KB
01/28/2018 09:20:33 PM
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kdebug.h
219 bytes
01/28/2018 09:20:33 PM
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kdebug_32.h
1.99 KB
01/28/2018 09:20:33 PM
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kdebug_64.h
393 bytes
01/28/2018 09:20:33 PM
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📄
kgdb.h
1014 bytes
01/28/2018 09:20:33 PM
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📄
kmap_types.h
233 bytes
01/28/2018 09:20:33 PM
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kprobes.h
1.41 KB
01/28/2018 09:20:33 PM
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ldc.h
4.37 KB
01/28/2018 09:20:33 PM
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leon.h
7.37 KB
01/28/2018 09:20:33 PM
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📄
leon_amba.h
8.09 KB
01/28/2018 09:20:33 PM
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leon_pci.h
512 bytes
01/28/2018 09:20:33 PM
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lsu.h
1.04 KB
01/28/2018 09:20:33 PM
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📄
machines.h
1.5 KB
01/28/2018 09:20:33 PM
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mbus.h
2.93 KB
01/28/2018 09:20:33 PM
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mc146818rtc.h
298 bytes
01/28/2018 09:20:33 PM
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mc146818rtc_32.h
699 bytes
01/28/2018 09:20:33 PM
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mc146818rtc_64.h
689 bytes
01/28/2018 09:20:33 PM
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mdesc.h
2.99 KB
01/28/2018 09:20:33 PM
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memctrl.h
311 bytes
01/28/2018 09:20:33 PM
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mman.h
304 bytes
01/28/2018 09:20:33 PM
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mmu.h
207 bytes
01/28/2018 09:20:33 PM
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mmu_32.h
209 bytes
01/28/2018 09:20:33 PM
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mmu_64.h
3.14 KB
01/28/2018 09:20:33 PM
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📄
mmu_context.h
239 bytes
01/28/2018 09:20:33 PM
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mmu_context_32.h
1.07 KB
01/28/2018 09:20:33 PM
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mmu_context_64.h
4.15 KB
01/28/2018 09:20:33 PM
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mmzone.h
393 bytes
01/28/2018 09:20:33 PM
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msi.h
774 bytes
01/28/2018 09:20:33 PM
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mxcc.h
4.33 KB
01/28/2018 09:20:33 PM
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nmi.h
354 bytes
01/28/2018 09:20:33 PM
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ns87303.h
3.22 KB
01/28/2018 09:20:33 PM
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obio.h
6.26 KB
01/28/2018 09:20:33 PM
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openprom.h
7.3 KB
01/28/2018 09:20:33 PM
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oplib.h
215 bytes
01/28/2018 09:20:33 PM
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oplib_32.h
5.92 KB
01/28/2018 09:20:33 PM
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oplib_64.h
8.12 KB
01/28/2018 09:20:33 PM
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page.h
274 bytes
01/28/2018 09:20:33 PM
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page_32.h
3.91 KB
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page_64.h
4.49 KB
01/28/2018 09:20:33 PM
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parport.h
5.68 KB
06/16/2023 05:32:39 PM
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pbm.h
1.47 KB
01/28/2018 09:20:33 PM
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pci.h
207 bytes
01/28/2018 09:20:33 PM
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pci_32.h
1.09 KB
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pci_64.h
1.49 KB
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pcic.h
5.77 KB
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pcr.h
1.85 KB
01/28/2018 09:20:33 PM
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percpu.h
219 bytes
01/28/2018 09:20:33 PM
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percpu_32.h
168 bytes
01/28/2018 09:20:33 PM
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percpu_64.h
515 bytes
01/28/2018 09:20:33 PM
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perf_event.h
802 bytes
01/28/2018 09:20:33 PM
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pgalloc.h
223 bytes
01/28/2018 09:20:33 PM
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pgalloc_32.h
1.91 KB
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pgalloc_64.h
2.85 KB
01/28/2018 09:20:33 PM
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pgtable.h
223 bytes
01/28/2018 09:20:33 PM
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pgtable_32.h
11.35 KB
01/28/2018 09:20:33 PM
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pgtable_64.h
30.71 KB
06/16/2023 05:32:39 PM
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pgtsrmmu.h
6.05 KB
01/28/2018 09:20:33 PM
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pil.h
1.08 KB
01/28/2018 09:20:33 PM
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processor.h
231 bytes
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processor_32.h
3.13 KB
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processor_64.h
7.58 KB
01/28/2018 09:20:33 PM
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prom.h
2.02 KB
01/28/2018 09:20:33 PM
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psr.h
1.38 KB
01/28/2018 09:20:33 PM
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ptrace.h
4.19 KB
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qrwlock.h
205 bytes
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qspinlock.h
215 bytes
01/28/2018 09:20:33 PM
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ross.h
5.52 KB
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sbi.h
3.34 KB
01/28/2018 09:20:33 PM
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scratchpad.h
547 bytes
01/28/2018 09:20:33 PM
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seccomp.h
225 bytes
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sections.h
289 bytes
01/28/2018 09:20:33 PM
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setup.h
1.52 KB
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sfafsr.h
3.14 KB
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sfp-machine.h
239 bytes
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sfp-machine_32.h
6.79 KB
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sfp-machine_64.h
3.1 KB
01/28/2018 09:20:33 PM
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shmparam.h
227 bytes
01/28/2018 09:20:33 PM
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shmparam_32.h
253 bytes
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shmparam_64.h
306 bytes
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sigcontext.h
2.55 KB
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signal.h
835 bytes
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smp.h
207 bytes
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smp_32.h
3.29 KB
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smp_64.h
1.84 KB
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sparsemem.h
349 bytes
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spinlock.h
227 bytes
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spinlock_32.h
4.22 KB
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spinlock_64.h
409 bytes
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spinlock_types.h
549 bytes
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spitfire.h
9.73 KB
01/28/2018 09:20:33 PM
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stacktrace.h
166 bytes
01/28/2018 09:20:33 PM
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starfire.h
418 bytes
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string.h
1.13 KB
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string_32.h
405 bytes
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string_64.h
505 bytes
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sunbpp.h
3.27 KB
01/28/2018 09:20:33 PM
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swift.h
3.07 KB
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switch_to.h
231 bytes
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switch_to_32.h
3.53 KB
01/28/2018 09:20:33 PM
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switch_to_64.h
2.58 KB
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syscall.h
3.41 KB
01/28/2018 09:20:33 PM
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syscalls.h
307 bytes
01/28/2018 09:20:33 PM
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termbits.h
198 bytes
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termios.h
4.94 KB
01/28/2018 09:20:33 PM
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thread_info.h
239 bytes
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thread_info_32.h
3.66 KB
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thread_info_64.h
7.84 KB
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timer.h
215 bytes
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Editing: floppy_64.h
Close
/* SPDX-License-Identifier: GPL-2.0 */ /* floppy.h: Sparc specific parts of the Floppy driver. * * Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net) * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) * * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) */ #ifndef __ASM_SPARC64_FLOPPY_H #define __ASM_SPARC64_FLOPPY_H #include <linux/of.h> #include <linux/of_device.h> #include <linux/dma-mapping.h> #include <asm/auxio.h> /* * Define this to enable exchanging drive 0 and 1 if only drive 1 is * probed on PCI machines. */ #undef PCI_FDC_SWAP_DRIVES /* References: * 1) Netbsd Sun floppy driver. * 2) NCR 82077 controller manual * 3) Intel 82077 controller manual */ struct sun_flpy_controller { volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */ volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */ volatile unsigned char dor_82077; /* Digital Output reg. */ volatile unsigned char tapectl_82077; /* Tape Control reg */ volatile unsigned char status_82077; /* Main Status Register. */ #define drs_82077 status_82077 /* Digital Rate Select reg. */ volatile unsigned char data_82077; /* Data fifo. */ volatile unsigned char ___unused; volatile unsigned char dir_82077; /* Digital Input reg. */ #define dcr_82077 dir_82077 /* Config Control reg. */ }; /* You'll only ever find one controller on an Ultra anyways. */ static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1; unsigned long fdc_status; static struct platform_device *floppy_op = NULL; struct sun_floppy_ops { unsigned char (*fd_inb) (unsigned long port); void (*fd_outb) (unsigned char value, unsigned long port); void (*fd_enable_dma) (void); void (*fd_disable_dma) (void); void (*fd_set_dma_mode) (int); void (*fd_set_dma_addr) (char *); void (*fd_set_dma_count) (int); unsigned int (*get_dma_residue) (void); int (*fd_request_irq) (void); void (*fd_free_irq) (void); int (*fd_eject) (int); }; static struct sun_floppy_ops sun_fdops; #define fd_inb(port) sun_fdops.fd_inb(port) #define fd_outb(value,port) sun_fdops.fd_outb(value,port) #define fd_enable_dma() sun_fdops.fd_enable_dma() #define fd_disable_dma() sun_fdops.fd_disable_dma() #define fd_request_dma() (0) /* nothing... */ #define fd_free_dma() /* nothing... */ #define fd_clear_dma_ff() /* nothing... */ #define fd_set_dma_mode(mode) sun_fdops.fd_set_dma_mode(mode) #define fd_set_dma_addr(addr) sun_fdops.fd_set_dma_addr(addr) #define fd_set_dma_count(count) sun_fdops.fd_set_dma_count(count) #define get_dma_residue(x) sun_fdops.get_dma_residue() #define fd_request_irq() sun_fdops.fd_request_irq() #define fd_free_irq() sun_fdops.fd_free_irq() #define fd_eject(drive) sun_fdops.fd_eject(drive) /* Super paranoid... */ #undef HAVE_DISABLE_HLT static int sun_floppy_types[2] = { 0, 0 }; /* Here is where we catch the floppy driver trying to initialize, * therefore this is where we call the PROM device tree probing * routine etc. on the Sparc. */ #define FLOPPY0_TYPE sun_floppy_init() #define FLOPPY1_TYPE sun_floppy_types[1] #define FDC1 ((unsigned long)sun_fdc) #define N_FDC 1 #define N_DRIVE 8 /* No 64k boundary crossing problems on the Sparc. */ #define CROSS_64KB(a,s) (0) static unsigned char sun_82077_fd_inb(unsigned long port) { udelay(5); switch(port & 7) { default: printk("floppy: Asked to read unknown port %lx\n", port); panic("floppy: Port bolixed."); case 4: /* FD_STATUS */ return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA; case 5: /* FD_DATA */ return sbus_readb(&sun_fdc->data_82077); case 7: /* FD_DIR */ /* XXX: Is DCL on 0x80 in sun4m? */ return sbus_readb(&sun_fdc->dir_82077); } panic("sun_82072_fd_inb: How did I get here?"); } static void sun_82077_fd_outb(unsigned char value, unsigned long port) { udelay(5); switch(port & 7) { default: printk("floppy: Asked to write to unknown port %lx\n", port); panic("floppy: Port bolixed."); case 2: /* FD_DOR */ /* Happily, the 82077 has a real DOR register. */ sbus_writeb(value, &sun_fdc->dor_82077); break; case 5: /* FD_DATA */ sbus_writeb(value, &sun_fdc->data_82077); break; case 7: /* FD_DCR */ sbus_writeb(value, &sun_fdc->dcr_82077); break; case 4: /* FD_STATUS */ sbus_writeb(value, &sun_fdc->status_82077); break; } return; } /* For pseudo-dma (Sun floppy drives have no real DMA available to * them so we must eat the data fifo bytes directly ourselves) we have * three state variables. doing_pdma tells our inline low-level * assembly floppy interrupt entry point whether it should sit and eat * bytes from the fifo or just transfer control up to the higher level * floppy interrupt c-code. I tried very hard but I could not get the * pseudo-dma to work in c-code without getting many overruns and * underruns. If non-zero, doing_pdma encodes the direction of * the transfer for debugging. 1=read 2=write */ unsigned char *pdma_vaddr; unsigned long pdma_size; volatile int doing_pdma = 0; /* This is software state */ char *pdma_base = NULL; unsigned long pdma_areasize; /* Common routines to all controller types on the Sparc. */ static void sun_fd_disable_dma(void) { doing_pdma = 0; pdma_base = NULL; } static void sun_fd_set_dma_mode(int mode) { switch(mode) { case DMA_MODE_READ: doing_pdma = 1; break; case DMA_MODE_WRITE: doing_pdma = 2; break; default: printk("Unknown dma mode %d\n", mode); panic("floppy: Giving up..."); } } static void sun_fd_set_dma_addr(char *buffer) { pdma_vaddr = buffer; } static void sun_fd_set_dma_count(int length) { pdma_size = length; } static void sun_fd_enable_dma(void) { pdma_base = pdma_vaddr; pdma_areasize = pdma_size; } irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie) { if (likely(doing_pdma)) { void __iomem *stat = (void __iomem *) fdc_status; unsigned char *vaddr = pdma_vaddr; unsigned long size = pdma_size; u8 val; while (size) { val = readb(stat); if (unlikely(!(val & 0x80))) { pdma_vaddr = vaddr; pdma_size = size; return IRQ_HANDLED; } if (unlikely(!(val & 0x20))) { pdma_vaddr = vaddr; pdma_size = size; doing_pdma = 0; goto main_interrupt; } if (val & 0x40) { /* read */ *vaddr++ = readb(stat + 1); } else { unsigned char data = *vaddr++; /* write */ writeb(data, stat + 1); } size--; } pdma_vaddr = vaddr; pdma_size = size; /* Send Terminal Count pulse to floppy controller. */ val = readb(auxio_register); val |= AUXIO_AUX1_FTCNT; writeb(val, auxio_register); val &= ~AUXIO_AUX1_FTCNT; writeb(val, auxio_register); doing_pdma = 0; } main_interrupt: return floppy_interrupt(irq, dev_cookie); } static int sun_fd_request_irq(void) { static int once = 0; int error; if(!once) { once = 1; error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, 0, "floppy", NULL); return ((error == 0) ? 0 : -1); } return 0; } static void sun_fd_free_irq(void) { } static unsigned int sun_get_dma_residue(void) { /* XXX This isn't really correct. XXX */ return 0; } static int sun_fd_eject(int drive) { set_dor(0x00, 0xff, 0x90); udelay(500); set_dor(0x00, 0x6f, 0x00); udelay(500); return 0; } #include <asm/ebus_dma.h> #include <asm/ns87303.h> static struct ebus_dma_info sun_pci_fd_ebus_dma; static struct device *sun_floppy_dev; static int sun_pci_broken_drive = -1; struct sun_pci_dma_op { unsigned int addr; int len; int direction; char *buf; }; static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL}; static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL}; irqreturn_t floppy_interrupt(int irq, void *dev_id); static unsigned char sun_pci_fd_inb(unsigned long port) { udelay(5); return inb(port); } static void sun_pci_fd_outb(unsigned char val, unsigned long port) { udelay(5); outb(val, port); } static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port) { udelay(5); /* * XXX: Due to SUN's broken floppy connector on AX and AXi * we need to turn on MOTOR_0 also, if the floppy is * jumpered to DS1 (like most PC floppies are). I hope * this does not hurt correct hardware like the AXmp. * (Eddie, Sep 12 1998). */ if (port == ((unsigned long)sun_fdc) + 2) { if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) { val |= 0x10; } } outb(val, port); } #ifdef PCI_FDC_SWAP_DRIVES static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port) { udelay(5); /* * XXX: Due to SUN's broken floppy connector on AX and AXi * we need to turn on MOTOR_0 also, if the floppy is * jumpered to DS1 (like most PC floppies are). I hope * this does not hurt correct hardware like the AXmp. * (Eddie, Sep 12 1998). */ if (port == ((unsigned long)sun_fdc) + 2) { if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) { val &= ~(0x03); val |= 0x21; } } outb(val, port); } #endif /* PCI_FDC_SWAP_DRIVES */ static void sun_pci_fd_enable_dma(void) { BUG_ON((NULL == sun_pci_dma_pending.buf) || (0 == sun_pci_dma_pending.len) || (0 == sun_pci_dma_pending.direction)); sun_pci_dma_current.buf = sun_pci_dma_pending.buf; sun_pci_dma_current.len = sun_pci_dma_pending.len; sun_pci_dma_current.direction = sun_pci_dma_pending.direction; sun_pci_dma_pending.buf = NULL; sun_pci_dma_pending.len = 0; sun_pci_dma_pending.direction = 0; sun_pci_dma_pending.addr = -1U; sun_pci_dma_current.addr = dma_map_single(sun_floppy_dev, sun_pci_dma_current.buf, sun_pci_dma_current.len, sun_pci_dma_current.direction); ebus_dma_enable(&sun_pci_fd_ebus_dma, 1); if (ebus_dma_request(&sun_pci_fd_ebus_dma, sun_pci_dma_current.addr, sun_pci_dma_current.len)) BUG(); } static void sun_pci_fd_disable_dma(void) { ebus_dma_enable(&sun_pci_fd_ebus_dma, 0); if (sun_pci_dma_current.addr != -1U) dma_unmap_single(sun_floppy_dev, sun_pci_dma_current.addr, sun_pci_dma_current.len, sun_pci_dma_current.direction); sun_pci_dma_current.addr = -1U; } static void sun_pci_fd_set_dma_mode(int mode) { if (mode == DMA_MODE_WRITE) sun_pci_dma_pending.direction = DMA_TO_DEVICE; else sun_pci_dma_pending.direction = DMA_FROM_DEVICE; ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE); } static void sun_pci_fd_set_dma_count(int length) { sun_pci_dma_pending.len = length; } static void sun_pci_fd_set_dma_addr(char *buffer) { sun_pci_dma_pending.buf = buffer; } static unsigned int sun_pci_get_dma_residue(void) { return ebus_dma_residue(&sun_pci_fd_ebus_dma); } static int sun_pci_fd_request_irq(void) { return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1); } static void sun_pci_fd_free_irq(void) { ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0); } static int sun_pci_fd_eject(int drive) { return -EINVAL; } void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie) { floppy_interrupt(0, NULL); } /* * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI, * even if this is configured using DS1, thus looks like /dev/fd1 with * the cabling used in Ultras. */ #define DOR (port + 2) #define MSR (port + 4) #define FIFO (port + 5) static void sun_pci_fd_out_byte(unsigned long port, unsigned char val, unsigned long reg) { unsigned char status; int timeout = 1000; while (!((status = inb(MSR)) & 0x80) && --timeout) udelay(100); outb(val, reg); } static unsigned char sun_pci_fd_sensei(unsigned long port) { unsigned char result[2] = { 0x70, 0x00 }; unsigned char status; int i = 0; sun_pci_fd_out_byte(port, 0x08, FIFO); do { int timeout = 1000; while (!((status = inb(MSR)) & 0x80) && --timeout) udelay(100); if (!timeout) break; if ((status & 0xf0) == 0xd0) result[i++] = inb(FIFO); else break; } while (i < 2); return result[0]; } static void sun_pci_fd_reset(unsigned long port) { unsigned char mask = 0x00; unsigned char status; int timeout = 10000; outb(0x80, MSR); do { status = sun_pci_fd_sensei(port); if ((status & 0xc0) == 0xc0) mask |= 1 << (status & 0x03); else udelay(100); } while ((mask != 0x0f) && --timeout); } static int sun_pci_fd_test_drive(unsigned long port, int drive) { unsigned char status, data; int timeout = 1000; int ready; sun_pci_fd_reset(port); data = (0x10 << drive) | 0x0c | drive; sun_pci_fd_out_byte(port, data, DOR); sun_pci_fd_out_byte(port, 0x07, FIFO); sun_pci_fd_out_byte(port, drive & 0x03, FIFO); do { udelay(100); status = sun_pci_fd_sensei(port); } while (((status & 0xc0) == 0x80) && --timeout); if (!timeout) ready = 0; else ready = (status & 0x10) ? 0 : 1; sun_pci_fd_reset(port); return ready; } #undef FIFO #undef MSR #undef DOR static int __init ebus_fdthree_p(struct device_node *dp) { if (!strcmp(dp->name, "fdthree")) return 1; if (!strcmp(dp->name, "floppy")) { const char *compat; compat = of_get_property(dp, "compatible", NULL); if (compat && !strcmp(compat, "fdthree")) return 1; } return 0; } static unsigned long __init sun_floppy_init(void) { static int initialized = 0; struct device_node *dp; struct platform_device *op; const char *prop; char state[128]; if (initialized) return sun_floppy_types[0]; initialized = 1; op = NULL; for_each_node_by_name(dp, "SUNW,fdtwo") { if (strcmp(dp->parent->name, "sbus")) continue; op = of_find_device_by_node(dp); if (op) break; } if (op) { floppy_op = op; FLOPPY_IRQ = op->archdata.irqs[0]; } else { struct device_node *ebus_dp; void __iomem *auxio_reg; const char *state_prop; unsigned long config; dp = NULL; for_each_node_by_name(ebus_dp, "ebus") { for (dp = ebus_dp->child; dp; dp = dp->sibling) { if (ebus_fdthree_p(dp)) goto found_fdthree; } } found_fdthree: if (!dp) return 0; op = of_find_device_by_node(dp); if (!op) return 0; state_prop = of_get_property(op->dev.of_node, "status", NULL); if (state_prop && !strncmp(state_prop, "disabled", 8)) return 0; FLOPPY_IRQ = op->archdata.irqs[0]; /* Make sure the high density bit is set, some systems * (most notably Ultra5/Ultra10) come up with it clear. */ auxio_reg = (void __iomem *) op->resource[2].start; writel(readl(auxio_reg)|0x2, auxio_reg); sun_floppy_dev = &op->dev; spin_lock_init(&sun_pci_fd_ebus_dma.lock); /* XXX ioremap */ sun_pci_fd_ebus_dma.regs = (void __iomem *) op->resource[1].start; if (!sun_pci_fd_ebus_dma.regs) return 0; sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER | EBUS_DMA_FLAG_TCI_DISABLE); sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback; sun_pci_fd_ebus_dma.client_cookie = NULL; sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ; strcpy(sun_pci_fd_ebus_dma.name, "floppy"); if (ebus_dma_register(&sun_pci_fd_ebus_dma)) return 0; /* XXX ioremap */ sun_fdc = (struct sun_flpy_controller *) op->resource[0].start; sun_fdops.fd_inb = sun_pci_fd_inb; sun_fdops.fd_outb = sun_pci_fd_outb; can_use_virtual_dma = use_virtual_dma = 0; sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma; sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma; sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode; sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr; sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count; sun_fdops.get_dma_residue = sun_pci_get_dma_residue; sun_fdops.fd_request_irq = sun_pci_fd_request_irq; sun_fdops.fd_free_irq = sun_pci_fd_free_irq; sun_fdops.fd_eject = sun_pci_fd_eject; fdc_status = (unsigned long) &sun_fdc->status_82077; /* * XXX: Find out on which machines this is really needed. */ if (1) { sun_pci_broken_drive = 1; sun_fdops.fd_outb = sun_pci_fd_broken_outb; } allowed_drive_mask = 0; if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0)) sun_floppy_types[0] = 4; if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1)) sun_floppy_types[1] = 4; /* * Find NS87303 SuperIO config registers (through ecpp). */ config = 0; for (dp = ebus_dp->child; dp; dp = dp->sibling) { if (!strcmp(dp->name, "ecpp")) { struct platform_device *ecpp_op; ecpp_op = of_find_device_by_node(dp); if (ecpp_op) config = ecpp_op->resource[1].start; goto config_done; } } config_done: /* * Sanity check, is this really the NS87303? */ switch (config & 0x3ff) { case 0x02e: case 0x15c: case 0x26e: case 0x398: break; default: config = 0; } if (!config) return sun_floppy_types[0]; /* Enable PC-AT mode. */ ns87303_modify(config, ASC, 0, 0xc0); #ifdef PCI_FDC_SWAP_DRIVES /* * If only Floppy 1 is present, swap drives. */ if (!sun_floppy_types[0] && sun_floppy_types[1]) { /* * Set the drive exchange bit in FCR on NS87303, * make sure other bits are sane before doing so. */ ns87303_modify(config, FER, FER_EDM, 0); ns87303_modify(config, ASC, ASC_DRV2_SEL, 0); ns87303_modify(config, FCR, 0, FCR_LDE); config = sun_floppy_types[0]; sun_floppy_types[0] = sun_floppy_types[1]; sun_floppy_types[1] = config; if (sun_pci_broken_drive != -1) { sun_pci_broken_drive = 1 - sun_pci_broken_drive; sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb; } } #endif /* PCI_FDC_SWAP_DRIVES */ return sun_floppy_types[0]; } prop = of_get_property(op->dev.of_node, "status", NULL); if (prop && !strncmp(state, "disabled", 8)) return 0; /* * We cannot do of_ioremap here: it does request_region, * which the generic floppy driver tries to do once again. * But we must use the sdev resource values as they have * had parent ranges applied. */ sun_fdc = (struct sun_flpy_controller *) (op->resource[0].start + ((op->resource[0].flags & 0x1ffUL) << 32UL)); /* Last minute sanity check... */ if (sbus_readb(&sun_fdc->status1_82077) == 0xff) { sun_fdc = (struct sun_flpy_controller *)-1; return 0; } sun_fdops.fd_inb = sun_82077_fd_inb; sun_fdops.fd_outb = sun_82077_fd_outb; can_use_virtual_dma = use_virtual_dma = 1; sun_fdops.fd_enable_dma = sun_fd_enable_dma; sun_fdops.fd_disable_dma = sun_fd_disable_dma; sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode; sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr; sun_fdops.fd_set_dma_count = sun_fd_set_dma_count; sun_fdops.get_dma_residue = sun_get_dma_residue; sun_fdops.fd_request_irq = sun_fd_request_irq; sun_fdops.fd_free_irq = sun_fd_free_irq; sun_fdops.fd_eject = sun_fd_eject; fdc_status = (unsigned long) &sun_fdc->status_82077; /* Success... */ allowed_drive_mask = 0x01; sun_floppy_types[0] = 4; sun_floppy_types[1] = 0; return sun_floppy_types[0]; } #define EXTRA_FLOPPY_PARAMS static DEFINE_SPINLOCK(dma_spin_lock); #define claim_dma_lock() \ ({ unsigned long flags; \ spin_lock_irqsave(&dma_spin_lock, flags); \ flags; \ }) #define release_dma_lock(__flags) \ spin_unlock_irqrestore(&dma_spin_lock, __flags); #endif /* !(__ASM_SPARC64_FLOPPY_H) */