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05/09/2024 07:14:13 AM
rwxr-xr-x
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Kbuild
577 bytes
01/28/2018 09:20:33 PM
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abi.h
853 bytes
01/28/2018 09:20:33 PM
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addrspace.h
4.1 KB
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amon.h
409 bytes
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arch_hweight.h
792 bytes
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asm-eva.h
6.82 KB
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asm-offsets.h
35 bytes
01/28/2018 09:20:33 PM
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asm-prototypes.h
197 bytes
01/28/2018 09:20:33 PM
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asm.h
8.47 KB
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asmmacro-32.h
2.47 KB
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asmmacro-64.h
1.22 KB
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asmmacro.h
14.07 KB
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atomic.h
19.73 KB
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barrier.h
8.03 KB
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bcache.h
2.04 KB
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bitops.h
15.46 KB
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bitrev.h
608 bytes
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bmips-spaces.h
268 bytes
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bmips.h
3.45 KB
06/16/2023 05:32:39 PM
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bootinfo.h
5.08 KB
01/28/2018 09:20:33 PM
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branch.h
2.35 KB
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break.h
787 bytes
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bug.h
759 bytes
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bugs.h
944 bytes
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cache.h
546 bytes
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cacheflush.h
4.99 KB
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cacheops.h
3.71 KB
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cdmm.h
3.67 KB
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cevt-r4k.h
823 bytes
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checksum.h
6.43 KB
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clock.h
997 bytes
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clocksource.h
884 bytes
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cmp.h
492 bytes
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cmpxchg.h
5.28 KB
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compat-signal.h
640 bytes
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compat.h
6.66 KB
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compiler.h
2.96 KB
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cop2.h
1.77 KB
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cpu-features.h
19.46 KB
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cpu-info.h
5.84 KB
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cpu-type.h
4.13 KB
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cpu.h
15.54 KB
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cpufeature.h
717 bytes
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debug.h
654 bytes
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dec
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05/09/2024 07:14:16 AM
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delay.h
841 bytes
01/28/2018 09:20:33 PM
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device.h
347 bytes
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div64.h
2.17 KB
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dma-coherence.h
813 bytes
01/28/2018 09:20:33 PM
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dma-mapping.h
981 bytes
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dma.h
9.92 KB
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ds1287.h
1019 bytes
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dsemul.h
3.24 KB
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dsp.h
1.91 KB
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edac.h
819 bytes
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elf.h
15.04 KB
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emma
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05/09/2024 07:14:16 AM
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errno.h
429 bytes
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eva.h
796 bytes
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exec.h
579 bytes
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extable.h
241 bytes
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fb.h
372 bytes
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fixmap.h
2.29 KB
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floppy.h
1.57 KB
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fpregdef.h
2.66 KB
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fpu.h
5.21 KB
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fpu_emulator.h
5.74 KB
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ftrace.h
2.11 KB
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futex.h
4.87 KB
01/28/2018 09:20:33 PM
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fw
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05/09/2024 07:14:16 AM
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gio_device.h
1.5 KB
01/28/2018 09:20:33 PM
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gt64120.h
19.37 KB
01/28/2018 09:20:33 PM
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hardirq.h
544 bytes
01/28/2018 09:20:33 PM
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hazards.h
8.36 KB
01/28/2018 09:20:33 PM
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highmem.h
1.72 KB
01/28/2018 09:20:33 PM
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hpet.h
1.93 KB
01/28/2018 09:20:33 PM
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hugetlb.h
2.76 KB
06/16/2023 05:32:39 PM
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hw_irq.h
475 bytes
01/28/2018 09:20:33 PM
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i8259.h
2.52 KB
01/28/2018 09:20:33 PM
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ide.h
330 bytes
01/28/2018 09:20:33 PM
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idle.h
689 bytes
01/28/2018 09:20:33 PM
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inst.h
2.34 KB
01/28/2018 09:20:33 PM
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io.h
18.44 KB
06/16/2023 05:32:39 PM
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📁
ip32
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05/09/2024 07:14:16 AM
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irq.h
2.26 KB
01/28/2018 09:20:33 PM
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irq_cpu.h
708 bytes
01/28/2018 09:20:33 PM
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irq_gt641xx.h
2.69 KB
01/28/2018 09:20:33 PM
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irq_regs.h
744 bytes
01/28/2018 09:20:33 PM
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irqflags.h
4.04 KB
01/28/2018 09:20:33 PM
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isa-rev.h
556 bytes
06/16/2023 05:32:39 PM
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isadep.h
603 bytes
01/28/2018 09:20:33 PM
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jazz.h
8 KB
01/28/2018 09:20:33 PM
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jazzdma.h
2.97 KB
01/28/2018 09:20:33 PM
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jump_label.h
1.4 KB
06/16/2023 05:32:39 PM
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kdebug.h
303 bytes
01/28/2018 09:20:33 PM
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kexec.h
1.53 KB
06/16/2023 05:32:39 PM
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kgdb.h
1.19 KB
01/28/2018 09:20:33 PM
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kmap_types.h
221 bytes
01/28/2018 09:20:33 PM
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kprobes.h
2.68 KB
01/28/2018 09:20:33 PM
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kvm_host.h
37.88 KB
06/16/2023 05:32:39 PM
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kvm_para.h
2.09 KB
01/28/2018 09:20:33 PM
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📁
lasat
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05/09/2024 07:14:16 AM
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linkage.h
306 bytes
01/28/2018 09:20:33 PM
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llsc.h
623 bytes
01/28/2018 09:20:33 PM
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local.h
4.99 KB
01/28/2018 09:20:33 PM
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m48t37.h
732 bytes
01/28/2018 09:20:33 PM
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maar.h
4.04 KB
01/28/2018 09:20:33 PM
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mach-ar7
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05/09/2024 07:14:16 AM
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mach-ath25
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05/09/2024 07:14:16 AM
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mach-ath79
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05/09/2024 07:14:16 AM
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mach-au1x00
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05/09/2024 07:14:16 AM
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mach-bcm47xx
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05/09/2024 07:14:16 AM
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mach-bcm63xx
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05/09/2024 07:14:16 AM
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📁
mach-bmips
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05/09/2024 07:14:16 AM
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mach-cavium-octeon
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05/09/2024 07:14:16 AM
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mach-cobalt
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mach-db1x00
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mach-dec
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mach-emma2rh
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mach-generic
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mach-ip22
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mach-ip27
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mach-ip28
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mach-ip32
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mach-jazz
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mach-jz4740
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mach-lantiq
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mach-lasat
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mach-loongson32
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mach-loongson64
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mach-malta
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05/09/2024 07:14:16 AM
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mach-netlogic
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05/09/2024 07:14:16 AM
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mach-paravirt
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mach-pic32
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mach-pistachio
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05/09/2024 07:14:16 AM
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mach-pmcs-msp71xx
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mach-pnx833x
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mach-ralink
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mach-rc32434
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mach-rm
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mach-sibyte
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mach-tx39xx
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mach-tx49xx
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mach-vr41xx
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mach-xilfpga
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machine.h
2.93 KB
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mc146818-time.h
3.69 KB
01/28/2018 09:20:33 PM
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mc146818rtc.h
450 bytes
01/28/2018 09:20:33 PM
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mips-boards
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mips-cm.h
15.86 KB
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mips-cpc.h
5.83 KB
01/28/2018 09:20:33 PM
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mips-cps.h
6.55 KB
01/28/2018 09:20:33 PM
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mips-gic.h
12.3 KB
06/16/2023 05:32:39 PM
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mips-r2-to-r6-emul.h
2.05 KB
01/28/2018 09:20:33 PM
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mips_machine.h
1.32 KB
01/28/2018 09:20:33 PM
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mips_mt.h
707 bytes
01/28/2018 09:20:33 PM
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mipsmtregs.h
10.9 KB
01/28/2018 09:20:33 PM
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mipsprom.h
2.1 KB
01/28/2018 09:20:33 PM
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mipsregs.h
88.1 KB
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mmu.h
550 bytes
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mmu_context.h
5.41 KB
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mmzone.h
561 bytes
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module.h
4.45 KB
01/28/2018 09:20:33 PM
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msa.h
8.01 KB
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msc01_ic.h
6.55 KB
01/28/2018 09:20:33 PM
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netlogic
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nile4.h
10.33 KB
01/28/2018 09:20:33 PM
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octeon
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paccess.h
3.07 KB
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page.h
7.19 KB
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pci
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pci.h
4.08 KB
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perf_event.h
482 bytes
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pgalloc.h
3.21 KB
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pgtable-32.h
7.31 KB
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pgtable-64.h
10.87 KB
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pgtable-bits.h
7.36 KB
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pgtable.h
17.34 KB
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pm-cps.h
1.68 KB
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pm.h
3.99 KB
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pmon.h
1.64 KB
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prefetch.h
2.1 KB
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processor.h
11.71 KB
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prom.h
845 bytes
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ptrace.h
5.55 KB
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r4k-timer.h
604 bytes
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r4kcache.h
26.34 KB
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reboot.h
440 bytes
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reg.h
26 bytes
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regdef.h
2.63 KB
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rtlx.h
2.1 KB
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seccomp.h
800 bytes
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serial.h
607 bytes
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setup.h
884 bytes
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sgi
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sgialib.h
2.45 KB
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sgiarcs.h
15.32 KB
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shmparam.h
352 bytes
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sibyte
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sigcontext.h
1.04 KB
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signal.h
1.02 KB
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sim.h
2.32 KB
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smp-cps.h
1.18 KB
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smp-ops.h
2.33 KB
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smp.h
3.31 KB
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sn
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sni.h
7.27 KB
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socket.h
1.34 KB
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sparsemem.h
486 bytes
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spinlock.h
459 bytes
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Editing: cpu-info.h
Close
/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994 Waldorf GMBH * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle * Copyright (C) 1996 Paul M. Antoine * Copyright (C) 1999, 2000 Silicon Graphics, Inc. * Copyright (C) 2004 Maciej W. Rozycki */ #ifndef __ASM_CPU_INFO_H #define __ASM_CPU_INFO_H #include <linux/cache.h> #include <linux/types.h> #include <asm/mipsregs.h> /* * Descriptor for a cache */ struct cache_desc { unsigned int waysize; /* Bytes per way */ unsigned short sets; /* Number of lines per set */ unsigned char ways; /* Number of ways */ unsigned char linesz; /* Size of line in bytes */ unsigned char waybit; /* Bits to select in a cache set */ unsigned char flags; /* Flags describing cache properties */ }; struct guest_info { unsigned long ases; unsigned long ases_dyn; unsigned long long options; unsigned long long options_dyn; int tlbsize; u8 conf; u8 kscratch_mask; }; /* * Flag definitions */ #define MIPS_CACHE_NOT_PRESENT 0x00000001 #define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */ #define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */ #define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */ #define MIPS_IC_SNOOPS_REMOTE 0x00000010 /* Ic snoops remote stores */ #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ struct cpuinfo_mips { u64 asid_cache; #ifdef CONFIG_MIPS_ASID_BITS_VARIABLE unsigned long asid_mask; #endif /* * Capability and feature descriptor structure for MIPS CPU */ unsigned long ases; unsigned long long options; unsigned int udelay_val; unsigned int processor_id; unsigned int fpu_id; unsigned int fpu_csr31; unsigned int fpu_msk31; unsigned int msa_id; unsigned int cputype; int isa_level; int tlbsize; int tlbsizevtlb; int tlbsizeftlbsets; int tlbsizeftlbways; struct cache_desc icache; /* Primary I-cache */ struct cache_desc dcache; /* Primary D or combined I/D cache */ struct cache_desc vcache; /* Victim cache, between pcache and scache */ struct cache_desc scache; /* Secondary cache */ struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int package;/* physical package number */ unsigned int globalnumber; #ifdef CONFIG_64BIT int vmbits; /* Virtual memory size in bits */ #endif void *data; /* Additional data */ unsigned int watch_reg_count; /* Number that exist */ unsigned int watch_reg_use_cnt; /* Usable by ptrace */ #define NUM_WATCH_REGS 4 u16 watch_reg_masks[NUM_WATCH_REGS]; unsigned int kscratch_mask; /* Usable KScratch mask. */ /* * Cache Coherency attribute for write-combine memory writes. * (shifted by _CACHE_SHIFT) */ unsigned int writecombine; /* * Simple counter to prevent enabling HTW in nested * htw_start/htw_stop calls */ unsigned int htw_seq; /* VZ & Guest features */ struct guest_info guest; unsigned int gtoffset_mask; unsigned int guestid_mask; unsigned int guestid_cache; } __attribute__((aligned(SMP_CACHE_BYTES))); extern struct cpuinfo_mips cpu_data[]; #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] #define boot_cpu_data cpu_data[0] extern void cpu_probe(void); extern void cpu_report(void); extern const char *__cpu_name[]; #define cpu_name_string() __cpu_name[raw_smp_processor_id()] struct seq_file; struct notifier_block; extern int register_proc_cpuinfo_notifier(struct notifier_block *nb); extern int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v); #define proc_cpuinfo_notifier(fn, pri) \ ({ \ static struct notifier_block fn##_nb = { \ .notifier_call = fn, \ .priority = pri \ }; \ \ register_proc_cpuinfo_notifier(&fn##_nb); \ }) struct proc_cpuinfo_notifier_args { struct seq_file *m; unsigned long n; }; static inline unsigned int cpu_cluster(struct cpuinfo_mips *cpuinfo) { /* Optimisation for systems where multiple clusters aren't used */ if (!IS_ENABLED(CONFIG_CPU_MIPSR6)) return 0; return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CLUSTER) >> MIPS_GLOBALNUMBER_CLUSTER_SHF; } static inline unsigned int cpu_core(struct cpuinfo_mips *cpuinfo) { return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CORE) >> MIPS_GLOBALNUMBER_CORE_SHF; } static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo) { /* Optimisation for systems where VP(E)s aren't used */ if (!IS_ENABLED(CONFIG_MIPS_MT_SMP) && !IS_ENABLED(CONFIG_CPU_MIPSR6)) return 0; return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_VP) >> MIPS_GLOBALNUMBER_VP_SHF; } extern void cpu_set_cluster(struct cpuinfo_mips *cpuinfo, unsigned int cluster); extern void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core); extern void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe); static inline bool cpus_are_siblings(int cpua, int cpub) { struct cpuinfo_mips *infoa = &cpu_data[cpua]; struct cpuinfo_mips *infob = &cpu_data[cpub]; unsigned int gnuma, gnumb; if (infoa->package != infob->package) return false; gnuma = infoa->globalnumber & ~MIPS_GLOBALNUMBER_VP; gnumb = infob->globalnumber & ~MIPS_GLOBALNUMBER_VP; if (gnuma != gnumb) return false; return true; } static inline unsigned long cpu_asid_inc(void) { return 1 << CONFIG_MIPS_ASID_SHIFT; } static inline unsigned long cpu_asid_mask(struct cpuinfo_mips *cpuinfo) { #ifdef CONFIG_MIPS_ASID_BITS_VARIABLE return cpuinfo->asid_mask; #endif return ((1 << CONFIG_MIPS_ASID_BITS) - 1) << CONFIG_MIPS_ASID_SHIFT; } static inline void set_cpu_asid_mask(struct cpuinfo_mips *cpuinfo, unsigned long asid_mask) { #ifdef CONFIG_MIPS_ASID_BITS_VARIABLE cpuinfo->asid_mask = asid_mask; #endif } #endif /* __ASM_CPU_INFO_H */