OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:16 AM	rwxr-xr-x
📄 Kbuild	685 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-uaccess.h	4.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro.h	2.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	7.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	542 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	5.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bootparam.h	1.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	451 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	969 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheasm.h	3.77 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cacheflush.h	5.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	3.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 coprocessor.h	5.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 current.h	675 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	1.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	855 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	1.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	5.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	2.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 flat.h	686 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	979 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.59 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 highmem.h	2.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	320 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 initialize_mmu.h	4.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	2.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	1.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmem_layout.h	2.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	462 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	3.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	525 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mxregs.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 nommu_context.h	602 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	5.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci-bridge.h	2.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	1.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	108 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	14.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 platform.h	1.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	7.44 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ptrace.h	3.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 regs.h	3.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	376 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	443 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	561 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	502 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	967 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	4.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	412 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	1.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	2.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	601 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	982 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sysmem.h	426 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	1.79 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	5.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	1.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	501 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	8.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucontext.h	540 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	864 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	639 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	507 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vectors.h	4.05 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 vga.h	434 bytes	01/28/2018 09:20:33 PM	rw-r--r--

Name

Size

Modified

Perms

📁 ..

11/17/2022 06:42:16 AM

rwxr-xr-x

📄 Kbuild

685 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 asm-offsets.h

35 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 asm-uaccess.h

4.11 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 asmmacro.h

2.76 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 atomic.h

7.38 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 barrier.h

542 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops.h

5.08 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bootparam.h

1.37 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bugs.h

451 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cache.h

969 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cacheasm.h

3.77 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 cacheflush.h

5.76 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 checksum.h

6 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg.h

3.9 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 coprocessor.h

5.05 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 current.h

675 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 delay.h

1.63 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma-mapping.h

855 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma.h

1.79 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 elf.h

5.75 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 fixmap.h

2.5 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 flat.h

686 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 ftrace.h

979 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 futex.h

2.59 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 highmem.h

2.33 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 hw_breakpoint.h

1.45 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 hw_irq.h

320 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 initialize_mmu.h

4.58 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 io.h

2.09 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 irq.h

1.46 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 irqflags.h

1.99 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 kmem_layout.h

2.07 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu.h

462 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu_context.h

3.62 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 module.h

525 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 mxregs.h

1.3 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 nommu_context.h

602 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 page.h

5.69 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pci-bridge.h

2.16 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pci.h

1.37 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 perf_event.h

108 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 pgalloc.h

1.84 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 pgtable.h

14.89 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 platform.h

1.75 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 processor.h

7.44 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 ptrace.h

3.74 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 regs.h

3.87 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 segment.h

376 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 serial.h

443 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 shmparam.h

561 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 signal.h

502 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 smp.h

967 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 spinlock.h

4.6 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 spinlock_types.h

412 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 stacktrace.h

1.13 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 string.h

2.65 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 switch_to.h

601 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 syscall.h

982 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 sysmem.h

426 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 thread_info.h

3.62 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 timex.h

1.79 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 tlb.h

1.1 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 tlbflush.h

5.53 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 traps.h

1.87 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 types.h

501 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 uaccess.h

8.67 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 ucontext.h

540 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 unaligned.h

864 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 unistd.h

639 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 user.h

507 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 vectors.h

4.05 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 vga.h

434 bytes

01/28/2018 09:20:33 PM

rw-r--r--

Editing: pci-bridge.h

/*
 * include/asm-xtensa/pci-bridge.h
 *
 * This file is subject to the terms and conditions of the GNU General
 * Public License.  See the file "COPYING" in the main directory of
 * this archive for more details.
 *
 * Copyright (C) 2005 Tensilica Inc.
 */

#ifndef _XTENSA_PCI_BRIDGE_H
#define _XTENSA_PCI_BRIDGE_H

#ifdef __KERNEL__

struct device_node;
struct pci_controller;

/*
 * pciauto_bus_scan() enumerates the pci space.
 */

extern int pciauto_bus_scan(struct pci_controller *, int);

struct pci_space {
	unsigned long start;
	unsigned long end;
	unsigned long base;
};

/*
 * Structure of a PCI controller (host bridge)
 */

struct pci_controller {
	int index;			/* used for pci_controller_num */
	struct pci_controller *next;
	struct pci_bus *bus;
	void *arch_data;

int first_busno;
	int last_busno;

struct pci_ops *ops;
	volatile unsigned int *cfg_addr;
	volatile unsigned char *cfg_data;

/* Currently, we limit ourselves to 1 IO range and 3 mem
	 * ranges since the common pci_bus structure can't handle more
	 */
	struct resource	io_resource;
	struct resource mem_resources[3];
	int mem_resource_count;

/* Host bridge I/O and Memory space
	 * Used for BAR placement algorithms
	 */
	struct pci_space io_space;
	struct pci_space mem_space;

/* Return the interrupt number fo a device. */
	int (*map_irq)(struct pci_dev*, u8, u8);

};

static inline void pcibios_init_resource(struct resource *res,
		unsigned long start, unsigned long end, int flags, char *name)
{
	res->start = start;
	res->end = end;
	res->flags = flags;
	res->name = name;
	res->parent = NULL;
	res->sibling = NULL;
	res->child = NULL;
}

/* These are used for config access before all the PCI probing has been done. */
int early_read_config_byte(struct pci_controller*, int, int, int, u8*);
int early_read_config_word(struct pci_controller*, int, int, int, u16*);
int early_read_config_dword(struct pci_controller*, int, int, int, u32*);
int early_write_config_byte(struct pci_controller*, int, int, int, u8);
int early_write_config_word(struct pci_controller*, int, int, int, u16);
int early_write_config_dword(struct pci_controller*, int, int, int, u32);

#endif	/* __KERNEL__ */
#endif	/* _XTENSA_PCI_BRIDGE_H */