OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:16 AM	rwxr-xr-x
📄 Kbuild	467 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 adc.h	253 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 addrspace.h	2.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 alignment.h	654 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic-grb.h	2.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic-irq.h	1.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic-llsc.h	2.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	1.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops-cas.h	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops-grb.h	6.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops-llsc.h	2.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops-op32.h	3.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	2.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bl_bit.h	216 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bl_bit_32.h	639 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bl_bit_64.h	979 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	2.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	1.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	1.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache_insns.h	242 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache_insns_32.h	642 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache_insns_64.h	839 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	3.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	140 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum_32.h	5.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clock.h	436 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg-cas.h	549 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg-grb.h	2.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg-irq.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg-llsc.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg-xchg.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	450 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	694 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-register.h	1.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	3.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmabrg.h	536 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dwarf.h	9.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	7.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry-macros.S	1.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	227 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	375 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	2.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 flat.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 freq.h	472 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex-cas.h	728 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex-irq.h	482 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex-llsc.h	870 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	1.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 gpio.h	1017 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	440 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hd64461.h	11.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 heartbeat.h	383 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	915 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 i2c-sh7760.h	406 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	11.33 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 io_generic.h	661 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_noioport.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_trapped.h	1.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	226 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	406 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	2.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	851 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	265 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	154 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec.h	939 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	2.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	4.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context_32.h	1.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context_64.h	1.97 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	1005 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	6.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	3.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	797 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	1.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level.h	598 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-3level.h	1.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable_32.h	16.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable_64.h	11.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 posix_types.h	146 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	4.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor_32.h	4.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor_64.h	5.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	3.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace_32.h	307 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace_64.h	312 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 push-switch.h	755 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 reboot.h	472 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 romimage-macros.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rtc.h	383 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 seccomp.h	280 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	307 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	879 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	725 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfp-machine.h	3.43 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 sh7760fb.h	5.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sh_bios.h	743 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	629 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 siu.h	539 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smc37c93x.h	5.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp-ops.h	1012 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	1.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	443 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spi.h	265 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock-cas.h	2.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock-llsc.h	4.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	578 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	463 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sram.h	670 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	711 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	606 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	131 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string_32.h	2.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string_64.h	499 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 suspend.h	2.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	492 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to_32.h	3.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to_64.h	968 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	267 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall_32.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall_64.h	1.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls.h	564 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls_32.h	1022 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls_64.h	441 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	5.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	637 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	4.12 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb_64.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	645 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	487 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps_32.h	1.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps_64.h	851 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	411 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	4.83 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 uaccess_32.h	3.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess_64.h	2.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned-sh4a.h	4.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	359 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uncached.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	952 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwinder.h	856 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	2.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	98 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vmlinux.lds.h	558 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 watchdog.h	4.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 word-at-a-time.h	1.29 KB	01/28/2018 09:20:33 PM	rw-r--r--

Name

Size

Modified

Perms

📁 ..

11/17/2022 06:42:16 AM

rwxr-xr-x

📄 Kbuild

467 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 adc.h

253 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 addrspace.h

2.03 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 alignment.h

654 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 asm-offsets.h

35 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 atomic-grb.h

2.6 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 atomic-irq.h

1.63 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 atomic-llsc.h

2.12 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 atomic.h

1.78 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 barrier.h

1.52 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops-cas.h

1.73 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops-grb.h

6.21 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops-llsc.h

2.79 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops-op32.h

3.78 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bitops.h

2.38 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bl_bit.h

216 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 bl_bit_32.h

639 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 bl_bit_64.h

979 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 bug.h

2.77 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 bugs.h

1.38 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cache.h

1.2 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cache_insns.h

242 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cache_insns_32.h

642 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cache_insns_64.h

839 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cacheflush.h

3.58 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 checksum.h

140 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 checksum_32.h

5.21 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 clock.h

436 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg-cas.h

549 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg-grb.h

2.8 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg-irq.h

1.04 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg-llsc.h

1.06 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg-xchg.h

1.33 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 cmpxchg.h

1.77 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 device.h

450 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma-mapping.h

694 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma-register.h

1.8 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 dma.h

3.74 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 dmabrg.h

536 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 dwarf.h

9.8 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 elf.h

7.28 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 entry-macros.S

1.85 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 extable.h

227 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 fb.h

375 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 fixmap.h

2.92 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 flat.h

1.23 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 fpu.h

1.77 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 freq.h

472 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 ftrace.h

1.11 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 futex-cas.h

728 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 futex-irq.h

482 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 futex-llsc.h

870 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 futex.h

1.5 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 gpio.h

1017 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 hardirq.h

440 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 hd64461.h

11.79 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 heartbeat.h

383 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 hugetlb.h

1.96 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 hw_breakpoint.h

1.88 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 hw_irq.h

915 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 i2c-sh7760.h

406 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 io.h

11.33 KB

11/01/2022 04:52:05 PM

rw-r--r--

📄 io_generic.h

661 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 io_noioport.h

1.09 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 io_trapped.h

1.44 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 irq.h

1.68 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 irqflags.h

226 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 kdebug.h

406 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 kexec.h

2.61 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 kgdb.h

851 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 kmap_types.h

265 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 kprobes.h

1.51 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 linkage.h

154 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 machvec.h

939 bytes

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu.h

2.18 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu_context.h

4.44 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu_context_32.h

1.28 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmu_context_64.h

1.97 KB

01/28/2018 09:20:33 PM

rw-r--r--

📄 mmzone.h

1.1 KB

01/28/2018 09:20:33 PM

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📄 module.h

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Editing: sh7760fb.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver.
 *
 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
 * 			Manuel Lauss <mano@roarinelk.homelinux.net>
 * (c) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
 */

#ifndef _ASM_SH_SH7760FB_H
#define _ASM_SH_SH7760FB_H

/*
 * some bits of the colormap registers should be written as zero.
 * create a mask for that.
 */
#define SH7760FB_PALETTE_MASK 0x00f8fcf8

/* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */
#define SH7760FB_DMA_MASK 0x0C000000

/* palette */
#define LDPR(x) (((x) << 2))

/* framebuffer registers and bits */
#define LDICKR 0x400
#define LDMTR 0x402
/* see sh7760fb.h for LDMTR bits */
#define LDDFR 0x404
#define LDDFR_PABD (1 << 8)
#define LDDFR_COLOR_MASK 0x7F
#define LDSMR 0x406
#define LDSMR_ROT (1 << 13)
#define LDSARU 0x408
#define LDSARL 0x40c
#define LDLAOR 0x410
#define LDPALCR 0x412
#define LDPALCR_PALS (1 << 4)
#define LDPALCR_PALEN (1 << 0)
#define LDHCNR 0x414
#define LDHSYNR 0x416
#define LDVDLNR 0x418
#define LDVTLNR 0x41a
#define LDVSYNR 0x41c
#define LDACLNR 0x41e
#define LDINTR 0x420
#define LDPMMR 0x424
#define LDPSPR 0x426
#define LDCNTR 0x428
#define LDCNTR_DON (1 << 0)
#define LDCNTR_DON2 (1 << 4)

#ifdef CONFIG_CPU_SUBTYPE_SH7763
# define LDLIRNR       0x440
/* LDINTR bit */
# define LDINTR_MINTEN (1 << 15)
# define LDINTR_FINTEN (1 << 14)
# define LDINTR_VSINTEN (1 << 13)
# define LDINTR_VEINTEN (1 << 12)
# define LDINTR_MINTS (1 << 11)
# define LDINTR_FINTS (1 << 10)
# define LDINTR_VSINTS (1 << 9)
# define LDINTR_VEINTS (1 << 8)
# define VINT_START (LDINTR_VSINTEN)
# define VINT_CHECK (LDINTR_VSINTS)
#else
/* LDINTR bit */
# define LDINTR_VINTSEL (1 << 12)
# define LDINTR_VINTE (1 << 8)
# define LDINTR_VINTS (1 << 0)
# define VINT_START (LDINTR_VINTSEL)
# define VINT_CHECK (LDINTR_VINTS)
#endif

/* HSYNC polarity inversion */
#define LDMTR_FLMPOL (1 << 15)

/* VSYNC polarity inversion */
#define LDMTR_CL1POL (1 << 14)

/* DISPLAY-ENABLE polarity inversion */
#define LDMTR_DISPEN_LOWACT (1 << 13)

/* DISPLAY DATA BUS polarity inversion */
#define LDMTR_DPOL_LOWACT (1 << 12)

/* AC modulation signal enable */
#define LDMTR_MCNT (1 << 10)

/* Disable output of HSYNC during VSYNC period */
#define LDMTR_CL1CNT (1 << 9)

/* Disable output of VSYNC during VSYNC period */
#define LDMTR_CL2CNT (1 << 8)

/* Display types supported by the LCDC */
#define LDMTR_STN_MONO_4       0x00
#define LDMTR_STN_MONO_8       0x01
#define LDMTR_STN_COLOR_4      0x08
#define LDMTR_STN_COLOR_8      0x09
#define LDMTR_STN_COLOR_12     0x0A
#define LDMTR_STN_COLOR_16     0x0B
#define LDMTR_DSTN_MONO_8      0x11
#define LDMTR_DSTN_MONO_16     0x13
#define LDMTR_DSTN_COLOR_8     0x19
#define LDMTR_DSTN_COLOR_12    0x1A
#define LDMTR_DSTN_COLOR_16    0x1B
#define LDMTR_TFT_COLOR_16     0x2B

/* framebuffer color layout */
#define LDDFR_1BPP_MONO 0x00
#define LDDFR_2BPP_MONO 0x01
#define LDDFR_4BPP_MONO 0x02
#define LDDFR_6BPP_MONO 0x04
#define LDDFR_4BPP 0x0A
#define LDDFR_8BPP 0x0C
#define LDDFR_16BPP_RGB555 0x1D
#define LDDFR_16BPP_RGB565 0x2D

/* LCDC Pixclock sources */
#define LCDC_CLKSRC_BUSCLOCK 0
#define LCDC_CLKSRC_PERIPHERAL 1
#define LCDC_CLKSRC_EXTERNAL 2

#define LDICKR_CLKSRC(x) \
       (((x) & 3) << 12)

/* LCDC pixclock input divider. Set to 1 at a minimum! */
#define LDICKR_CLKDIV(x) \
       ((x) & 0x1f)

struct sh7760fb_platdata {

/* Set this member to a valid fb_videmode for the display you
	 * wish to use.  The following members must be initialized:
	 * xres, yres, hsync_len, vsync_len, sync,
	 * {left,right,upper,lower}_margin.
	 * The driver uses the above members to calculate register values
	 * and memory requirements. Other members are ignored but may
	 * be used by other framebuffer layer components.
	 */
	struct fb_videomode *def_mode;

/* LDMTR includes display type and signal polarity.  The
	 * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo
	 * data above; however the polarities of the following signals
	 * must be encoded in the ldmtr member:
	 * Display Enable signal (default high-active)  DISPEN_LOWACT
	 * Display Data signals (default high-active)   DPOL_LOWACT
	 * AC Modulation signal (default off)           MCNT
	 * Hsync-During-Vsync suppression (default off) CL1CNT
	 * Vsync-during-vsync suppression (default off) CL2CNT
	 * NOTE: also set a display type!
	 * (one of LDMTR_{STN,DSTN,TFT}_{MONO,COLOR}_{4,8,12,16})
	 */
	u16 ldmtr;

/* LDDFR controls framebuffer image format (depth, organization)
	 * Use ONE of the LDDFR_?BPP_* macros!
	 */
	u16 lddfr;

/* LDPMMR and LDPSPR control the timing of the power signals
	 * for the display. Please read the SH7760 Hardware Manual,
	 * Chapters 30.3.17, 30.3.18 and 30.4.6!
	 */
	u16 ldpmmr;
	u16 ldpspr;

/* LDACLNR contains the line numbers after which the AC modulation
	 * signal is to toggle. Set to ZERO for TFTs or displays which
	 * do not need it. (Chapter 30.3.15 in SH7760 Hardware Manual).
	 */
	u16 ldaclnr;

/* LDICKR contains information on pixelclock source and config.
	 * Please use the LDICKR_CLKSRC() and LDICKR_CLKDIV() macros.
	 * minimal value for CLKDIV() must be 1!.
	 */
	u16 ldickr;

/* set this member to 1 if you wish to use the LCDC's hardware
	 * rotation function.  This is limited to displays <= 320x200
	 * pixels resolution!
	 */
	int rotate;		/* set to 1 to rotate 90 CCW */

/* set this to 1 to suppress vsync irq use. */
	int novsync;

/* blanking hook for platform. Set this if your platform can do
	 * more than the LCDC in terms of blanking (e.g. disable clock
	 * generator / backlight power supply / etc.
	 */
	void (*blank) (int);
};

#endif /* _ASM_SH_SH7760FB_H */