OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:12 AM	rwxr-xr-x
📄 Kbuild	568 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_gicv3.h	9.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_timer.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arm-cci.h	1.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 assembler.h	10.46 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic.h	13.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 auxvec.h	29 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bL_switcher.h	2.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	2.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bitops.h	8.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitrev.h	451 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	2.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	546 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 cache.h	813 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	15.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cachetype.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	3.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	153 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	6.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compiler.h	978 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cp15.h	3.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpu.h	533 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpufeature.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpuidle.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cputype.h	8.42 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cti.h	3.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dcc.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	3.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-contiguous.h	265 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-iommu.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	7.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	4.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmi.h	528 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 domain.h	3.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ecard.h	5.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 edac.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 efi.h	3.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	4.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry-macro-multi.S	726 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 exception.h	571 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	375 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fiq.h	1.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 firmware.h	1.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 flat.h	915 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	3.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fncpy.h	3.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpstate.h	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	1.92 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 futex.h	4.24 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 glue-cache.h	3.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue-df.h	2.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue-pf.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue-proc.h	4.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue.h	759 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 gpio.h	693 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	803 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📁 hardware	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 highmem.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb-3level.h	2.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	3.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	349 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwcap.h	378 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hypervisor.h	140 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	566 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 idmap.h	355 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 insn.h	636 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 io.h	15.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1015 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 irq_work.h	234 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	3.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	1009 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec-internal.h	272 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 kexec.h	2.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	2.72 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kmap_types.h	190 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	2.65 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_arm.h	7.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_asm.h	2.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_coproc.h	1.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_emulate.h	7.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_host.h	10.31 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_hyp.h	4.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_mmio.h	1.34 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_mmu.h	7.27 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 limits.h	166 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	216 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 mach	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 mc146818rtc.h	720 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcpm.h	11.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcs_spinlock.h	570 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 memblock.h	248 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 memory.h	9.95 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu.h	953 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	3.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	1.57 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mpu.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mtd-xip.h	666 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 neon.h	1.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 nwflash.h	252 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 opcodes-sec.h	742 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 opcodes-virt.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 opcodes.h	8.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 outercache.h	3.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page-nommu.h	957 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	3.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 paravirt.h	454 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 patch.h	438 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	956 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	1.56 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 perf_event.h	857 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgalloc.h	3.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level-hwdef.h	3.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level-types.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level.h	8.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-3level-hwdef.h	3.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-3level-types.h	1.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-3level.h	9.54 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-hwdef.h	467 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-nommu.h	2.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable.h	11.71 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 probes.h	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 proc-fns.h	4.79 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 processor.h	3.4 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 procinfo.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 prom.h	715 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 psci.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	4.89 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 sections.h	189 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 set_memory.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	934 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	419 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	500 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	3.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_plat.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_scu.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_twd.h	908 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	716 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spectre.h	906 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 spinlock.h	5.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	541 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	742 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stage2_pgtable.h	2.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 suspend.h	369 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 swab.h	1005 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sync_bitops.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 system_info.h	763 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 system_misc.h	1.14 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 tcm.h	937 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 therm.h	655 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	5.2 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 thread_notify.h	1.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	577 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlb.h	7.37 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlbflush.h	17.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tls.h	3.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 trusted_foundations.h	2.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess-asm.h	2.83 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 uaccess.h	16.22 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 ucontext.h	2.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	846 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unified.h	1.61 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unistd.h	1.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	1.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	1.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	4.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 v7m.h	2.93 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vdso.h	507 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 vdso_datapage.h	1.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vfp.h	2.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vfpmacros.h	2.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vga.h	305 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 virt.h	2.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 word-at-a-time.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 xen	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 xor.h	5.22 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: pgtable-3level.h

/*
 * arch/arm/include/asm/pgtable-3level.h
 *
 * Copyright (C) 2011 ARM Ltd.
 * Author: Catalin Marinas <catalin.marinas@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 */
#ifndef _ASM_PGTABLE_3LEVEL_H
#define _ASM_PGTABLE_3LEVEL_H

/*
 * With LPAE, there are 3 levels of page tables. Each level has 512 entries of
 * 8 bytes each, occupying a 4K page. The first level table covers a range of
 * 512GB, each entry representing 1GB. Since we are limited to 4GB input
 * address range, only 4 entries in the PGD are used.
 *
 * There are enough spare bits in a page table entry for the kernel specific
 * state.
 */
#define PTRS_PER_PTE		512
#define PTRS_PER_PMD		512
#define PTRS_PER_PGD		4

#define PTE_HWTABLE_PTRS	(0)
#define PTE_HWTABLE_OFF		(0)
#define PTE_HWTABLE_SIZE	(PTRS_PER_PTE * sizeof(u64))

#define MAX_POSSIBLE_PHYSMEM_BITS 40

/*
 * PGDIR_SHIFT determines the size a top-level page table entry can map.
 */
#define PGDIR_SHIFT		30

/*
 * PMD_SHIFT determines the size a middle-level page table entry can map.
 */
#define PMD_SHIFT		21

#define PMD_SIZE		(1UL << PMD_SHIFT)
#define PMD_MASK		(~((1 << PMD_SHIFT) - 1))
#define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
#define PGDIR_MASK		(~((1 << PGDIR_SHIFT) - 1))

/*
 * section address mask and size definitions.
 */
#define SECTION_SHIFT		21
#define SECTION_SIZE		(1UL << SECTION_SHIFT)
#define SECTION_MASK		(~((1 << SECTION_SHIFT) - 1))

#define USER_PTRS_PER_PGD	(PAGE_OFFSET / PGDIR_SIZE)

/*
 * Hugetlb definitions.
 */
#define HPAGE_SHIFT		PMD_SHIFT
#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)
#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)

/*
 * "Linux" PTE definitions for LPAE.
 *
 * These bits overlap with the hardware bits but the naming is preserved for
 * consistency with the classic page table format.
 */
#define L_PTE_VALID		(_AT(pteval_t, 1) << 0)		/* Valid */
#define L_PTE_PRESENT		(_AT(pteval_t, 3) << 0)		/* Present */
#define L_PTE_USER		(_AT(pteval_t, 1) << 6)		/* AP[1] */
#define L_PTE_SHARED		(_AT(pteval_t, 3) << 8)		/* SH[1:0], inner shareable */
#define L_PTE_YOUNG		(_AT(pteval_t, 1) << 10)	/* AF */
#define L_PTE_XN		(_AT(pteval_t, 1) << 54)	/* XN */
#define L_PTE_DIRTY		(_AT(pteval_t, 1) << 55)
#define L_PTE_SPECIAL		(_AT(pteval_t, 1) << 56)
#define L_PTE_NONE		(_AT(pteval_t, 1) << 57)	/* PROT_NONE */
#define L_PTE_RDONLY		(_AT(pteval_t, 1) << 58)	/* READ ONLY */

#define L_PMD_SECT_VALID	(_AT(pmdval_t, 1) << 0)
#define L_PMD_SECT_DIRTY	(_AT(pmdval_t, 1) << 55)
#define L_PMD_SECT_NONE		(_AT(pmdval_t, 1) << 57)
#define L_PMD_SECT_RDONLY	(_AT(pteval_t, 1) << 58)

/*
 * To be used in assembly code with the upper page attributes.
 */
#define L_PTE_XN_HIGH		(1 << (54 - 32))
#define L_PTE_DIRTY_HIGH	(1 << (55 - 32))

/*
 * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
 */
#define L_PTE_MT_UNCACHED	(_AT(pteval_t, 0) << 2)	/* strongly ordered */
#define L_PTE_MT_BUFFERABLE	(_AT(pteval_t, 1) << 2)	/* normal non-cacheable */
#define L_PTE_MT_WRITETHROUGH	(_AT(pteval_t, 2) << 2)	/* normal inner write-through */
#define L_PTE_MT_WRITEBACK	(_AT(pteval_t, 3) << 2)	/* normal inner write-back */
#define L_PTE_MT_WRITEALLOC	(_AT(pteval_t, 7) << 2)	/* normal inner write-alloc */
#define L_PTE_MT_DEV_SHARED	(_AT(pteval_t, 4) << 2)	/* device */
#define L_PTE_MT_DEV_NONSHARED	(_AT(pteval_t, 4) << 2)	/* device */
#define L_PTE_MT_DEV_WC		(_AT(pteval_t, 1) << 2)	/* normal non-cacheable */
#define L_PTE_MT_DEV_CACHED	(_AT(pteval_t, 3) << 2)	/* normal inner write-back */
#define L_PTE_MT_MASK		(_AT(pteval_t, 7) << 2)

/*
 * Software PGD flags.
 */
#define L_PGD_SWAPPER		(_AT(pgdval_t, 1) << 55)	/* swapper_pg_dir entry */

/*
 * 2nd stage PTE definitions for LPAE.
 */
#define L_PTE_S2_MT_UNCACHED		(_AT(pteval_t, 0x0) << 2) /* strongly ordered */
#define L_PTE_S2_MT_WRITETHROUGH	(_AT(pteval_t, 0xa) << 2) /* normal inner write-through */
#define L_PTE_S2_MT_WRITEBACK		(_AT(pteval_t, 0xf) << 2) /* normal inner write-back */
#define L_PTE_S2_MT_DEV_SHARED		(_AT(pteval_t, 0x1) << 2) /* device */
#define L_PTE_S2_MT_MASK		(_AT(pteval_t, 0xf) << 2)

#define L_PTE_S2_RDONLY			(_AT(pteval_t, 1) << 6)   /* HAP[1]   */
#define L_PTE_S2_RDWR			(_AT(pteval_t, 3) << 6)   /* HAP[2:1] */

#define L_PMD_S2_RDONLY			(_AT(pmdval_t, 1) << 6)   /* HAP[1]   */
#define L_PMD_S2_RDWR			(_AT(pmdval_t, 3) << 6)   /* HAP[2:1] */

/*
 * Hyp-mode PL2 PTE definitions for LPAE.
 */
#define L_PTE_HYP		L_PTE_USER

#ifndef __ASSEMBLY__

#define pud_none(pud)		(!pud_val(pud))
#define pud_bad(pud)		(!(pud_val(pud) & 2))
#define pud_present(pud)	(pud_val(pud))
#define pmd_table(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
						 PMD_TYPE_TABLE)
#define pmd_sect(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
						 PMD_TYPE_SECT)
#define pmd_large(pmd)		pmd_sect(pmd)

#define pud_clear(pudp)			\
	do {				\
		*pudp = __pud(0);	\
		clean_pmd_entry(pudp);	\
	} while (0)

#define set_pud(pudp, pud)		\
	do {				\
		*pudp = pud;		\
		flush_pmd_entry(pudp);	\
	} while (0)

static inline pmd_t *pud_page_vaddr(pud_t pud)
{
	return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
}

/* Find an entry in the second-level page table.. */
#define pmd_index(addr)		(((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
{
	return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
}

#define pmd_bad(pmd)		(!(pmd_val(pmd) & 2))

#define copy_pmd(pmdpd,pmdps)		\
	do {				\
		*pmdpd = *pmdps;	\
		flush_pmd_entry(pmdpd);	\
	} while (0)

#define pmd_clear(pmdp)			\
	do {				\
		*pmdp = __pmd(0);	\
		clean_pmd_entry(pmdp);	\
	} while (0)

/*
 * For 3 levels of paging the PTE_EXT_NG bit will be set for user address ptes
 * that are written to a page table but not for ptes created with mk_pte.
 *
 * In hugetlb_no_page, a new huge pte (new_pte) is generated and passed to
 * hugetlb_cow, where it is compared with an entry in a page table.
 * This comparison test fails erroneously leading ultimately to a memory leak.
 *
 * To correct this behaviour, we mask off PTE_EXT_NG for any pte that is
 * present before running the comparison.
 */
#define __HAVE_ARCH_PTE_SAME
#define pte_same(pte_a,pte_b)	((pte_present(pte_a) ? pte_val(pte_a) & ~PTE_EXT_NG	\
					: pte_val(pte_a))				\
				== (pte_present(pte_b) ? pte_val(pte_b) & ~PTE_EXT_NG	\
					: pte_val(pte_b)))

#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext)))

#define pte_huge(pte)		(pte_val(pte) && !(pte_val(pte) & PTE_TABLE_BIT))
#define pte_mkhuge(pte)		(__pte(pte_val(pte) & ~PTE_TABLE_BIT))

#define pmd_isset(pmd, val)	((u32)(val) == (val) ? pmd_val(pmd) & (val) \
						: !!(pmd_val(pmd) & (val)))
#define pmd_isclear(pmd, val)	(!(pmd_val(pmd) & (val)))

#define pmd_present(pmd)	(pmd_isset((pmd), L_PMD_SECT_VALID))
#define pmd_young(pmd)		(pmd_isset((pmd), PMD_SECT_AF))
#define pte_special(pte)	(pte_isset((pte), L_PTE_SPECIAL))
static inline pte_t pte_mkspecial(pte_t pte)
{
	pte_val(pte) |= L_PTE_SPECIAL;
	return pte;
}
#define	__HAVE_ARCH_PTE_SPECIAL

#define pmd_write(pmd)		(pmd_isclear((pmd), L_PMD_SECT_RDONLY))
#define pmd_dirty(pmd)		(pmd_isset((pmd), L_PMD_SECT_DIRTY))
#define pud_page(pud)		pmd_page(__pmd(pud_val(pud)))
#define pud_write(pud)		pmd_write(__pmd(pud_val(pud)))

#define pmd_hugewillfault(pmd)	(!pmd_young(pmd) || !pmd_write(pmd))
#define pmd_thp_or_huge(pmd)	(pmd_huge(pmd) || pmd_trans_huge(pmd))

#ifdef CONFIG_TRANSPARENT_HUGEPAGE
#define pmd_trans_huge(pmd)	(pmd_val(pmd) && !pmd_table(pmd))
#endif

#define PMD_BIT_FUNC(fn,op) \
static inline pmd_t pmd_##fn(pmd_t pmd) { pmd_val(pmd) op; return pmd; }

PMD_BIT_FUNC(wrprotect,	|= L_PMD_SECT_RDONLY);
PMD_BIT_FUNC(mkold,	&= ~PMD_SECT_AF);
PMD_BIT_FUNC(mkwrite,   &= ~L_PMD_SECT_RDONLY);
PMD_BIT_FUNC(mkdirty,   |= L_PMD_SECT_DIRTY);
PMD_BIT_FUNC(mkclean,   &= ~L_PMD_SECT_DIRTY);
PMD_BIT_FUNC(mkyoung,   |= PMD_SECT_AF);

#define pmd_mkhuge(pmd)		(__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))

#define pmd_pfn(pmd)		(((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
#define pfn_pmd(pfn,prot)	(__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
#define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)

/* represent a notpresent pmd by faulting entry, this is used by pmdp_invalidate */
static inline pmd_t pmd_mknotpresent(pmd_t pmd)
{
	return __pmd(pmd_val(pmd) & ~L_PMD_SECT_VALID);
}

static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
{
	const pmdval_t mask = PMD_SECT_USER | PMD_SECT_XN | L_PMD_SECT_RDONLY |
				L_PMD_SECT_VALID | L_PMD_SECT_NONE;
	pmd_val(pmd) = (pmd_val(pmd) & ~mask) | (pgprot_val(newprot) & mask);
	return pmd;
}

static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
			      pmd_t *pmdp, pmd_t pmd)
{
	BUG_ON(addr >= TASK_SIZE);

/* create a faulting entry if PROT_NONE protected */
	if (pmd_val(pmd) & L_PMD_SECT_NONE)
		pmd_val(pmd) &= ~L_PMD_SECT_VALID;

if (pmd_write(pmd) && pmd_dirty(pmd))
		pmd_val(pmd) &= ~PMD_SECT_AP2;
	else
		pmd_val(pmd) |= PMD_SECT_AP2;

*pmdp = __pmd(pmd_val(pmd) | PMD_SECT_nG);
	flush_pmd_entry(pmdp);
}

#endif /* __ASSEMBLY__ */

#endif /* _ASM_PGTABLE_3LEVEL_H */