OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:12 AM	rwxr-xr-x
📄 Kbuild	568 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_gicv3.h	9.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_timer.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arm-cci.h	1.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 assembler.h	10.46 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic.h	13.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 auxvec.h	29 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bL_switcher.h	2.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	2.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bitops.h	8.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitrev.h	451 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	2.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	546 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 cache.h	813 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	15.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cachetype.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	3.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	153 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	6.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compiler.h	978 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cp15.h	3.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cpu.h	533 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpufeature.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpuidle.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cputype.h	8.42 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cti.h	3.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dcc.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	3.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-contiguous.h	265 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-iommu.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	7.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	4.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dmi.h	528 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 domain.h	3.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ecard.h	5.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 edac.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 efi.h	3.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	4.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry-macro-multi.S	726 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 exception.h	571 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	375 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fiq.h	1.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 firmware.h	1.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 flat.h	915 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	3.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fncpy.h	3.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpstate.h	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	1.92 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 futex.h	4.24 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 glue-cache.h	3.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue-df.h	2.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue-pf.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue-proc.h	4.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 glue.h	759 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 gpio.h	693 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	803 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📁 hardware	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 highmem.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb-3level.h	2.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	3.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	349 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwcap.h	378 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hypervisor.h	140 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	566 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 idmap.h	355 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 insn.h	636 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 io.h	15.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1015 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 irq_work.h	234 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	3.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	1009 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec-internal.h	272 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 kexec.h	2.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	2.72 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kmap_types.h	190 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	2.65 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_arm.h	7.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_asm.h	2.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_coproc.h	1.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_emulate.h	7.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_host.h	10.31 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_hyp.h	4.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_mmio.h	1.34 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 kvm_mmu.h	7.27 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 limits.h	166 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	216 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 mach	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 mc146818rtc.h	720 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcpm.h	11.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mcs_spinlock.h	570 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 memblock.h	248 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 memory.h	9.95 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu.h	953 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	3.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	1.57 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mpu.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mtd-xip.h	666 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 neon.h	1.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 nwflash.h	252 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 opcodes-sec.h	742 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 opcodes-virt.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 opcodes.h	8.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 outercache.h	3.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page-nommu.h	957 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	3.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 paravirt.h	454 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 patch.h	438 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	956 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	1.56 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 perf_event.h	857 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgalloc.h	3.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level-hwdef.h	3.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level-types.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level.h	8.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-3level-hwdef.h	3.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-3level-types.h	1.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-3level.h	9.54 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable-hwdef.h	467 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-nommu.h	2.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgtable.h	11.71 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 probes.h	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 proc-fns.h	4.79 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 processor.h	3.4 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 procinfo.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 prom.h	715 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 psci.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	4.89 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 sections.h	189 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 set_memory.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	934 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	419 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	500 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	3.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_plat.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_scu.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp_twd.h	908 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	716 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spectre.h	906 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 spinlock.h	5.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	541 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	742 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stage2_pgtable.h	2.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 suspend.h	369 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 swab.h	1005 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sync_bitops.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 system_info.h	763 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 system_misc.h	1.14 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 tcm.h	937 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 therm.h	655 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	5.2 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 thread_notify.h	1.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	577 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlb.h	7.37 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlbflush.h	17.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tls.h	3.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 trusted_foundations.h	2.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess-asm.h	2.83 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 uaccess.h	16.22 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 ucontext.h	2.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	846 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unified.h	1.61 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unistd.h	1.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	1.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	1.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	4.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 v7m.h	2.93 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vdso.h	507 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 vdso_datapage.h	1.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vfp.h	2.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vfpmacros.h	2.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 vga.h	305 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 virt.h	2.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 word-at-a-time.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 xen	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 xor.h	5.22 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: pgtable-2level.h

/*
 *  arch/arm/include/asm/pgtable-2level.h
 *
 *  Copyright (C) 1995-2002 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef _ASM_PGTABLE_2LEVEL_H
#define _ASM_PGTABLE_2LEVEL_H

#define __PAGETABLE_PMD_FOLDED 1

/*
 * Hardware-wise, we have a two level page table structure, where the first
 * level has 4096 entries, and the second level has 256 entries.  Each entry
 * is one 32-bit word.  Most of the bits in the second level entry are used
 * by hardware, and there aren't any "accessed" and "dirty" bits.
 *
 * Linux on the other hand has a three level page table structure, which can
 * be wrapped to fit a two level page table structure easily - using the PGD
 * and PTE only.  However, Linux also expects one "PTE" table per page, and
 * at least a "dirty" bit.
 *
 * Therefore, we tweak the implementation slightly - we tell Linux that we
 * have 2048 entries in the first level, each of which is 8 bytes (iow, two
 * hardware pointers to the second level.)  The second level contains two
 * hardware PTE tables arranged contiguously, preceded by Linux versions
 * which contain the state information Linux needs.  We, therefore, end up
 * with 512 entries in the "PTE" level.
 *
 * This leads to the page tables having the following layout:
 *
 *    pgd             pte
 * |        |
 * +--------+
 * |        |       +------------+ +0
 * +- - - - +       | Linux pt 0 |
 * |        |       +------------+ +1024
 * +--------+ +0    | Linux pt 1 |
 * |        |-----> +------------+ +2048
 * +- - - - + +4    |  h/w pt 0  |
 * |        |-----> +------------+ +3072
 * +--------+ +8    |  h/w pt 1  |
 * |        |       +------------+ +4096
 *
 * See L_PTE_xxx below for definitions of bits in the "Linux pt", and
 * PTE_xxx for definitions of bits appearing in the "h/w pt".
 *
 * PMD_xxx definitions refer to bits in the first level page table.
 *
 * The "dirty" bit is emulated by only granting hardware write permission
 * iff the page is marked "writable" and "dirty" in the Linux PTE.  This
 * means that a write to a clean page will cause a permission fault, and
 * the Linux MM layer will mark the page dirty via handle_pte_fault().
 * For the hardware to notice the permission change, the TLB entry must
 * be flushed, and ptep_set_access_flags() does that for us.
 *
 * The "accessed" or "young" bit is emulated by a similar method; we only
 * allow accesses to the page if the "young" bit is set.  Accesses to the
 * page will cause a fault, and handle_pte_fault() will set the young bit
 * for us as long as the page is marked present in the corresponding Linux
 * PTE entry.  Again, ptep_set_access_flags() will ensure that the TLB is
 * up to date.
 *
 * However, when the "young" bit is cleared, we deny access to the page
 * by clearing the hardware PTE.  Currently Linux does not flush the TLB
 * for us in this case, which means the TLB will retain the transation
 * until either the TLB entry is evicted under pressure, or a context
 * switch which changes the user space mapping occurs.
 */
#define PTRS_PER_PTE		512
#define PTRS_PER_PMD		1
#define PTRS_PER_PGD		2048

#define PTE_HWTABLE_PTRS	(PTRS_PER_PTE)
#define PTE_HWTABLE_OFF		(PTE_HWTABLE_PTRS * sizeof(pte_t))
#define PTE_HWTABLE_SIZE	(PTRS_PER_PTE * sizeof(u32))

#define MAX_POSSIBLE_PHYSMEM_BITS	32

/*
 * PMD_SHIFT determines the size of the area a second-level page table can map
 * PGDIR_SHIFT determines what a third-level page table entry can map
 */
#define PMD_SHIFT		21
#define PGDIR_SHIFT		21

#define PMD_SIZE		(1UL << PMD_SHIFT)
#define PMD_MASK		(~(PMD_SIZE-1))
#define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
#define PGDIR_MASK		(~(PGDIR_SIZE-1))

/*
 * section address mask and size definitions.
 */
#define SECTION_SHIFT		20
#define SECTION_SIZE		(1UL << SECTION_SHIFT)
#define SECTION_MASK		(~(SECTION_SIZE-1))

/*
 * ARMv6 supersection address mask and size definitions.
 */
#define SUPERSECTION_SHIFT	24
#define SUPERSECTION_SIZE	(1UL << SUPERSECTION_SHIFT)
#define SUPERSECTION_MASK	(~(SUPERSECTION_SIZE-1))

#define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)

/*
 * "Linux" PTE definitions.
 *
 * We keep two sets of PTEs - the hardware and the linux version.
 * This allows greater flexibility in the way we map the Linux bits
 * onto the hardware tables, and allows us to have YOUNG and DIRTY
 * bits.
 *
 * The PTE table pointer refers to the hardware entries; the "Linux"
 * entries are stored 1024 bytes below.
 */
#define L_PTE_VALID		(_AT(pteval_t, 1) << 0)		/* Valid */
#define L_PTE_PRESENT		(_AT(pteval_t, 1) << 0)
#define L_PTE_YOUNG		(_AT(pteval_t, 1) << 1)
#define L_PTE_DIRTY		(_AT(pteval_t, 1) << 6)
#define L_PTE_RDONLY		(_AT(pteval_t, 1) << 7)
#define L_PTE_USER		(_AT(pteval_t, 1) << 8)
#define L_PTE_XN		(_AT(pteval_t, 1) << 9)
#define L_PTE_SHARED		(_AT(pteval_t, 1) << 10)	/* shared(v6), coherent(xsc3) */
#define L_PTE_NONE		(_AT(pteval_t, 1) << 11)

/*
 * These are the memory types, defined to be compatible with
 * pre-ARMv6 CPUs cacheable and bufferable bits: n/a,n/a,C,B
 * ARMv6+ without TEX remapping, they are a table index.
 * ARMv6+ with TEX remapping, they correspond to n/a,TEX(0),C,B
 *
 * MT type		Pre-ARMv6	ARMv6+ type / cacheable status
 * UNCACHED		Uncached	Strongly ordered
 * BUFFERABLE		Bufferable	Normal memory / non-cacheable
 * WRITETHROUGH		Writethrough	Normal memory / write through
 * WRITEBACK		Writeback	Normal memory / write back, read alloc
 * MINICACHE		Minicache	N/A
 * WRITEALLOC		Writeback	Normal memory / write back, write alloc
 * DEV_SHARED		Uncached	Device memory (shared)
 * DEV_NONSHARED	Uncached	Device memory (non-shared)
 * DEV_WC		Bufferable	Normal memory / non-cacheable
 * DEV_CACHED		Writeback	Normal memory / write back, read alloc
 * VECTORS		Variable	Normal memory / variable
 *
 * All normal memory mappings have the following properties:
 * - reads can be repeated with no side effects
 * - repeated reads return the last value written
 * - reads can fetch additional locations without side effects
 * - writes can be repeated (in certain cases) with no side effects
 * - writes can be merged before accessing the target
 * - unaligned accesses can be supported
 *
 * All device mappings have the following properties:
 * - no access speculation
 * - no repetition (eg, on return from an exception)
 * - number, order and size of accesses are maintained
 * - unaligned accesses are "unpredictable"
 */
#define L_PTE_MT_UNCACHED	(_AT(pteval_t, 0x00) << 2)	/* 0000 */
#define L_PTE_MT_BUFFERABLE	(_AT(pteval_t, 0x01) << 2)	/* 0001 */
#define L_PTE_MT_WRITETHROUGH	(_AT(pteval_t, 0x02) << 2)	/* 0010 */
#define L_PTE_MT_WRITEBACK	(_AT(pteval_t, 0x03) << 2)	/* 0011 */
#define L_PTE_MT_MINICACHE	(_AT(pteval_t, 0x06) << 2)	/* 0110 (sa1100, xscale) */
#define L_PTE_MT_WRITEALLOC	(_AT(pteval_t, 0x07) << 2)	/* 0111 */
#define L_PTE_MT_DEV_SHARED	(_AT(pteval_t, 0x04) << 2)	/* 0100 */
#define L_PTE_MT_DEV_NONSHARED	(_AT(pteval_t, 0x0c) << 2)	/* 1100 */
#define L_PTE_MT_DEV_WC		(_AT(pteval_t, 0x09) << 2)	/* 1001 */
#define L_PTE_MT_DEV_CACHED	(_AT(pteval_t, 0x0b) << 2)	/* 1011 */
#define L_PTE_MT_VECTORS	(_AT(pteval_t, 0x0f) << 2)	/* 1111 */
#define L_PTE_MT_MASK		(_AT(pteval_t, 0x0f) << 2)

#ifndef __ASSEMBLY__

/*
 * The "pud_xxx()" functions here are trivial when the pmd is folded into
 * the pud: the pud entry is never bad, always exists, and can't be set or
 * cleared.
 */
#define pud_none(pud)		(0)
#define pud_bad(pud)		(0)
#define pud_present(pud)	(1)
#define pud_clear(pudp)		do { } while (0)
#define set_pud(pud,pudp)	do { } while (0)

static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
{
	return (pmd_t *)pud;
}

#define pmd_large(pmd)		(pmd_val(pmd) & 2)
#define pmd_bad(pmd)		(pmd_val(pmd) & 2)
#define pmd_present(pmd)	(pmd_val(pmd))

#define copy_pmd(pmdpd,pmdps)		\
	do {				\
		pmdpd[0] = pmdps[0];	\
		pmdpd[1] = pmdps[1];	\
		flush_pmd_entry(pmdpd);	\
	} while (0)

#define pmd_clear(pmdp)			\
	do {				\
		pmdp[0] = __pmd(0);	\
		pmdp[1] = __pmd(0);	\
		clean_pmd_entry(pmdp);	\
	} while (0)

/* we don't need complex calculations here as the pmd is folded into the pgd */
#define pmd_addr_end(addr,end) (end)

#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
#define pte_special(pte)	(0)
static inline pte_t pte_mkspecial(pte_t pte) { return pte; }

/*
 * We don't have huge page support for short descriptors, for the moment
 * define empty stubs for use by pin_page_for_write.
 */
#define pmd_hugewillfault(pmd)	(0)
#define pmd_thp_or_huge(pmd)	(0)

#endif /* __ASSEMBLY__ */

#endif /* _ASM_PGTABLE_2LEVEL_H */