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linux-headers-4.15.0-197
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include
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asm
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..
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11/17/2022 06:42:16 AM
rwxr-xr-x
📄
Kbuild
294 bytes
01/28/2018 09:20:33 PM
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a.out-core.h
1.89 KB
01/28/2018 09:20:33 PM
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acenv.h
1.56 KB
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acpi.h
4.76 KB
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agp.h
1.04 KB
01/28/2018 09:20:33 PM
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alternative-asm.h
2.43 KB
01/28/2018 09:20:33 PM
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alternative.h
8.28 KB
11/01/2022 04:52:05 PM
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amd_nb.h
2.98 KB
01/28/2018 09:20:33 PM
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apb_timer.h
1.43 KB
01/28/2018 09:20:33 PM
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apic.h
14.53 KB
11/01/2022 04:52:05 PM
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apic_flat_64.h
151 bytes
01/28/2018 09:20:33 PM
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apicdef.h
11.26 KB
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apm.h
1.8 KB
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arch_hweight.h
1.28 KB
01/28/2018 09:20:33 PM
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archrandom.h
3.03 KB
11/01/2022 04:52:05 PM
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asm-offsets.h
35 bytes
01/28/2018 09:20:33 PM
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asm-prototypes.h
946 bytes
01/28/2018 09:20:33 PM
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asm.h
4.97 KB
11/01/2022 04:52:05 PM
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atomic.h
6.02 KB
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atomic64_32.h
8.71 KB
01/28/2018 09:20:33 PM
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atomic64_64.h
6.31 KB
11/01/2022 04:52:05 PM
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barrier.h
3.6 KB
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bios_ebda.h
914 bytes
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bitops.h
13.78 KB
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boot.h
1.53 KB
01/28/2018 09:20:33 PM
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bootparam_utils.h
2.86 KB
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bug.h
2.07 KB
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bugs.h
493 bytes
01/28/2018 09:20:33 PM
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cache.h
641 bytes
01/28/2018 09:20:33 PM
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cacheflush.h
306 bytes
01/28/2018 09:20:33 PM
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cacheinfo.h
209 bytes
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calgary.h
2.31 KB
01/28/2018 09:20:33 PM
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ce4100.h
121 bytes
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checksum.h
133 bytes
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checksum_32.h
4.86 KB
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checksum_64.h
5.41 KB
01/28/2018 09:20:33 PM
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clocksource.h
488 bytes
01/28/2018 09:20:33 PM
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cmdline.h
302 bytes
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cmpxchg.h
7.68 KB
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cmpxchg_32.h
3.15 KB
01/28/2018 09:20:33 PM
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cmpxchg_64.h
543 bytes
01/28/2018 09:20:33 PM
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compat.h
7.37 KB
11/01/2022 04:52:05 PM
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cpu.h
975 bytes
01/28/2018 09:20:33 PM
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cpu_device_id.h
1.38 KB
11/01/2022 04:52:05 PM
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cpu_entry_area.h
2.27 KB
01/28/2018 09:20:33 PM
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cpufeature.h
7.75 KB
11/01/2022 04:52:05 PM
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cpufeatures.h
24.62 KB
11/01/2022 04:52:05 PM
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cpumask.h
408 bytes
01/28/2018 09:20:33 PM
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crash.h
320 bytes
11/01/2022 04:52:05 PM
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crypto
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11/17/2022 06:42:22 AM
rwxr-xr-x
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current.h
443 bytes
01/28/2018 09:20:33 PM
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debugreg.h
2.67 KB
01/28/2018 09:20:33 PM
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delay.h
208 bytes
01/28/2018 09:20:33 PM
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desc.h
11.42 KB
01/28/2018 09:20:33 PM
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desc_defs.h
3.16 KB
01/28/2018 09:20:33 PM
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device.h
568 bytes
01/28/2018 09:20:33 PM
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disabled-features.h
2.31 KB
11/01/2022 04:52:05 PM
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div64.h
1.79 KB
01/28/2018 09:20:33 PM
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dma-mapping.h
2.4 KB
01/28/2018 09:20:33 PM
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dma.h
9.58 KB
11/01/2022 04:52:05 PM
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dmi.h
556 bytes
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dwarf2.h
2.43 KB
01/28/2018 09:20:33 PM
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e820
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11/17/2022 06:42:22 AM
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edac.h
474 bytes
01/28/2018 09:20:33 PM
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efi.h
6.9 KB
11/01/2022 04:52:05 PM
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elf.h
10.82 KB
01/28/2018 09:20:33 PM
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emergency-restart.h
202 bytes
01/28/2018 09:20:33 PM
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entry_arch.h
1.88 KB
01/28/2018 09:20:33 PM
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espfix.h
426 bytes
01/28/2018 09:20:33 PM
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exec.h
37 bytes
01/28/2018 09:20:33 PM
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export.h
120 bytes
01/28/2018 09:20:33 PM
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extable.h
1.27 KB
01/28/2018 09:20:33 PM
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fb.h
540 bytes
01/28/2018 09:20:33 PM
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fixmap.h
6.04 KB
11/01/2022 04:52:05 PM
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floppy.h
6.59 KB
01/28/2018 09:20:33 PM
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fpu
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11/17/2022 06:42:22 AM
rwxr-xr-x
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frame.h
815 bytes
01/28/2018 09:20:33 PM
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ftrace.h
1.8 KB
01/28/2018 09:20:33 PM
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futex.h
2.2 KB
01/28/2018 09:20:33 PM
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gart.h
2.64 KB
01/28/2018 09:20:33 PM
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genapic.h
22 bytes
01/28/2018 09:20:33 PM
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geode.h
842 bytes
01/28/2018 09:20:33 PM
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hardirq.h
2.3 KB
11/01/2022 04:52:05 PM
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highmem.h
2.6 KB
01/28/2018 09:20:33 PM
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hpet.h
3.38 KB
01/28/2018 09:20:33 PM
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hugetlb.h
2.15 KB
01/28/2018 09:20:33 PM
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hw_breakpoint.h
1.96 KB
01/28/2018 09:20:33 PM
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hw_irq.h
3.85 KB
11/01/2022 04:52:05 PM
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hypervisor.h
1.84 KB
01/28/2018 09:20:33 PM
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i8259.h
1.93 KB
11/01/2022 04:52:05 PM
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ia32.h
1.46 KB
01/28/2018 09:20:33 PM
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ia32_unistd.h
313 bytes
01/28/2018 09:20:33 PM
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imr.h
1.81 KB
01/28/2018 09:20:33 PM
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inat.h
6.58 KB
01/28/2018 09:20:33 PM
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inat_types.h
1013 bytes
01/28/2018 09:20:33 PM
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init.h
632 bytes
01/28/2018 09:20:33 PM
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insn-eval.h
837 bytes
01/28/2018 09:20:33 PM
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insn.h
7.46 KB
11/01/2022 04:52:05 PM
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inst.h
5.07 KB
01/28/2018 09:20:33 PM
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intel-family.h
3.29 KB
11/01/2022 04:52:05 PM
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intel-mid.h
4.91 KB
01/28/2018 09:20:33 PM
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intel_ds.h
793 bytes
01/28/2018 09:20:33 PM
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intel_mid_vrtc.h
326 bytes
01/28/2018 09:20:33 PM
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intel_pmc_ipc.h
2.08 KB
01/28/2018 09:20:33 PM
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intel_pt.h
292 bytes
01/28/2018 09:20:33 PM
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intel_punit_ipc.h
4.56 KB
01/28/2018 09:20:33 PM
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intel_rdt_sched.h
2.59 KB
01/28/2018 09:20:33 PM
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intel_scu_ipc.h
2.3 KB
01/28/2018 09:20:33 PM
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intel_telemetry.h
3.96 KB
01/28/2018 09:20:33 PM
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invpcid.h
1.57 KB
01/28/2018 09:20:33 PM
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io.h
12.21 KB
01/28/2018 09:20:33 PM
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io_apic.h
5.63 KB
01/28/2018 09:20:33 PM
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iomap.h
1.22 KB
01/28/2018 09:20:33 PM
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iommu.h
392 bytes
01/28/2018 09:20:33 PM
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iommu_table.h
3.82 KB
01/28/2018 09:20:33 PM
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iosf_mbi.h
5.74 KB
01/28/2018 09:20:33 PM
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ipi.h
2.84 KB
01/28/2018 09:20:33 PM
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irq.h
1.12 KB
01/28/2018 09:20:33 PM
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irq_regs.h
679 bytes
01/28/2018 09:20:33 PM
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irq_remapping.h
2.96 KB
11/01/2022 04:52:05 PM
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irq_vectors.h
4.12 KB
01/28/2018 09:20:33 PM
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irq_work.h
397 bytes
01/28/2018 09:20:33 PM
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irqdomain.h
1.61 KB
01/28/2018 09:20:33 PM
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irqflags.h
4.38 KB
11/01/2022 04:52:05 PM
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ist.h
735 bytes
01/28/2018 09:20:33 PM
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jump_label.h
2.44 KB
01/28/2018 09:20:33 PM
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kasan.h
966 bytes
01/28/2018 09:20:33 PM
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kaslr.h
424 bytes
01/28/2018 09:20:33 PM
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kbdleds.h
454 bytes
01/28/2018 09:20:33 PM
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kdebug.h
752 bytes
01/28/2018 09:20:33 PM
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kexec-bzimage64.h
189 bytes
01/28/2018 09:20:33 PM
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kexec.h
6.69 KB
11/01/2022 04:52:05 PM
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kgdb.h
2.09 KB
01/28/2018 09:20:33 PM
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kmap_types.h
289 bytes
01/28/2018 09:20:33 PM
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kprobes.h
3.82 KB
01/28/2018 09:20:33 PM
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kvm_emulate.h
15.23 KB
11/01/2022 04:52:05 PM
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kvm_guest.h
172 bytes
01/28/2018 09:20:33 PM
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kvm_host.h
42.72 KB
11/01/2022 04:52:05 PM
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kvm_page_track.h
2.48 KB
01/28/2018 09:20:33 PM
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kvm_para.h
3 KB
01/28/2018 09:20:33 PM
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kvmclock.h
170 bytes
01/28/2018 09:20:33 PM
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linkage.h
581 bytes
01/28/2018 09:20:33 PM
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livepatch.h
1.12 KB
01/28/2018 09:20:33 PM
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local.h
3.83 KB
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local64.h
33 bytes
01/28/2018 09:20:33 PM
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mach_timer.h
1.55 KB
01/28/2018 09:20:33 PM
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mach_traps.h
1013 bytes
01/28/2018 09:20:33 PM
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math_emu.h
395 bytes
01/28/2018 09:20:33 PM
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mc146818rtc.h
2.76 KB
01/28/2018 09:20:33 PM
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mce.h
12.54 KB
11/01/2022 04:52:05 PM
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mem_encrypt.h
2.83 KB
01/28/2018 09:20:33 PM
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microcode.h
4.14 KB
11/01/2022 04:52:05 PM
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microcode_amd.h
1.41 KB
11/01/2022 04:52:05 PM
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microcode_intel.h
2.46 KB
01/28/2018 09:20:33 PM
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misc.h
143 bytes
01/28/2018 09:20:33 PM
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mmconfig.h
374 bytes
01/28/2018 09:20:33 PM
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mmu.h
1.57 KB
01/28/2018 09:20:33 PM
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mmu_context.h
10.27 KB
11/01/2022 04:52:05 PM
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mmx.h
337 bytes
01/28/2018 09:20:33 PM
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mmzone.h
129 bytes
01/28/2018 09:20:33 PM
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mmzone_32.h
1.16 KB
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mmzone_64.h
430 bytes
01/28/2018 09:20:33 PM
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module.h
2.05 KB
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mpspec.h
3.93 KB
01/28/2018 09:20:33 PM
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mpspec_def.h
3.93 KB
01/28/2018 09:20:33 PM
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mpx.h
2.97 KB
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mshyperv.h
10.69 KB
01/28/2018 09:20:33 PM
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msi.h
392 bytes
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msidef.h
1.77 KB
01/28/2018 09:20:33 PM
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msr-index.h
30.36 KB
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msr-trace.h
1.35 KB
01/28/2018 09:20:33 PM
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msr.h
10.85 KB
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mtrr.h
4.62 KB
01/28/2018 09:20:33 PM
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mwait.h
3.74 KB
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nmi.h
1.39 KB
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nops.h
4.31 KB
01/28/2018 09:20:33 PM
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nospec-branch.h
10.87 KB
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numa.h
2.18 KB
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numa_32.h
256 bytes
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numachip
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11/17/2022 06:42:22 AM
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olpc.h
3.16 KB
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olpc_ofw.h
1.1 KB
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orc_lookup.h
1.63 KB
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orc_types.h
3.47 KB
01/28/2018 09:20:33 PM
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page.h
2.18 KB
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page_32.h
1.01 KB
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page_32_types.h
1.7 KB
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page_64.h
1.42 KB
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page_64_types.h
2.34 KB
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page_types.h
2.29 KB
01/28/2018 09:20:33 PM
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paravirt.h
23.31 KB
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paravirt_types.h
22.15 KB
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parport.h
314 bytes
01/28/2018 09:20:33 PM
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pat.h
768 bytes
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pci-direct.h
995 bytes
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pci-functions.h
654 bytes
01/28/2018 09:20:33 PM
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pci.h
3.51 KB
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pci_64.h
684 bytes
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pci_x86.h
5.71 KB
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percpu.h
18.97 KB
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perf_event.h
8.82 KB
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perf_event_p4.h
26.1 KB
01/28/2018 09:20:33 PM
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pgalloc.h
5.57 KB
01/28/2018 09:20:33 PM
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pgtable-2level.h
2.75 KB
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pgtable-2level_types.h
867 bytes
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pgtable-3level.h
10.24 KB
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pgtable-3level_types.h
1.06 KB
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pgtable-invert.h
1.07 KB
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pgtable.h
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Editing: kvm_emulate.h
Close
/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * x86_emulate.h * * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. * * Copyright (c) 2005 Keir Fraser * * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 */ #ifndef _ASM_X86_KVM_X86_EMULATE_H #define _ASM_X86_KVM_X86_EMULATE_H #include <asm/desc_defs.h> struct x86_emulate_ctxt; enum x86_intercept; enum x86_intercept_stage; struct x86_exception { u8 vector; bool error_code_valid; u16 error_code; bool nested_page_fault; u64 address; /* cr2 or nested page fault gpa */ u8 async_page_fault; }; /* * This struct is used to carry enough information from the instruction * decoder to main KVM so that a decision can be made whether the * instruction needs to be intercepted or not. */ struct x86_instruction_info { u8 intercept; /* which intercept */ u8 rep_prefix; /* rep prefix? */ u8 modrm_mod; /* mod part of modrm */ u8 modrm_reg; /* index of register used */ u8 modrm_rm; /* rm part of modrm */ u64 src_val; /* value of source operand */ u64 dst_val; /* value of destination operand */ u8 src_bytes; /* size of source operand */ u8 dst_bytes; /* size of destination operand */ u8 ad_bytes; /* size of src/dst address */ u64 next_rip; /* rip following the instruction */ }; /* * x86_emulate_ops: * * These operations represent the instruction emulator's interface to memory. * There are two categories of operation: those that act on ordinary memory * regions (*_std), and those that act on memory regions known to require * special treatment or emulation (*_emulated). * * The emulator assumes that an instruction accesses only one 'emulated memory' * location, that this location is the given linear faulting address (cr2), and * that this is one of the instruction's data operands. Instruction fetches and * stack operations are assumed never to access emulated memory. The emulator * automatically deduces which operand of a string-move operation is accessing * emulated memory, and assumes that the other operand accesses normal memory. * * NOTES: * 1. The emulator isn't very smart about emulated vs. standard memory. * 'Emulated memory' access addresses should be checked for sanity. * 'Normal memory' accesses may fault, and the caller must arrange to * detect and handle reentrancy into the emulator via recursive faults. * Accesses may be unaligned and may cross page boundaries. * 2. If the access fails (cannot emulate, or a standard access faults) then * it is up to the memop to propagate the fault to the guest VM via * some out-of-band mechanism, unknown to the emulator. The memop signals * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will * then immediately bail. * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only * cmpxchg8b_emulated need support 8-byte accesses. * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. */ /* Access completed successfully: continue emulation as normal. */ #define X86EMUL_CONTINUE 0 /* Access is unhandleable: bail from emulation and return error to caller. */ #define X86EMUL_UNHANDLEABLE 1 /* Terminate emulation but return success to the caller. */ #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ struct x86_emulate_ops { /* * read_gpr: read a general purpose register (rax - r15) * * @reg: gpr number. */ ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); /* * write_gpr: write a general purpose register (rax - r15) * * @reg: gpr number. * @val: value to write. */ void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); /* * read_std: Read bytes of standard (non-emulated/special) memory. * Used for descriptor reading. * @addr: [IN ] Linear address from which to read. * @val: [OUT] Value read from memory, zero-extended to 'u_long'. * @bytes: [IN ] Number of bytes to read from memory. * @system:[IN ] Whether the access is forced to be at CPL0. */ int (*read_std)(struct x86_emulate_ctxt *ctxt, unsigned long addr, void *val, unsigned int bytes, struct x86_exception *fault, bool system); /* * read_phys: Read bytes of standard (non-emulated/special) memory. * Used for descriptor reading. * @addr: [IN ] Physical address from which to read. * @val: [OUT] Value read from memory. * @bytes: [IN ] Number of bytes to read from memory. */ int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr, void *val, unsigned int bytes); /* * write_std: Write bytes of standard (non-emulated/special) memory. * Used for descriptor writing. * @addr: [IN ] Linear address to which to write. * @val: [OUT] Value write to memory, zero-extended to 'u_long'. * @bytes: [IN ] Number of bytes to write to memory. * @system:[IN ] Whether the access is forced to be at CPL0. */ int (*write_std)(struct x86_emulate_ctxt *ctxt, unsigned long addr, void *val, unsigned int bytes, struct x86_exception *fault, bool system); /* * fetch: Read bytes of standard (non-emulated/special) memory. * Used for instruction fetch. * @addr: [IN ] Linear address from which to read. * @val: [OUT] Value read from memory, zero-extended to 'u_long'. * @bytes: [IN ] Number of bytes to read from memory. */ int (*fetch)(struct x86_emulate_ctxt *ctxt, unsigned long addr, void *val, unsigned int bytes, struct x86_exception *fault); /* * read_emulated: Read bytes from emulated/special memory area. * @addr: [IN ] Linear address from which to read. * @val: [OUT] Value read from memory, zero-extended to 'u_long'. * @bytes: [IN ] Number of bytes to read from memory. */ int (*read_emulated)(struct x86_emulate_ctxt *ctxt, unsigned long addr, void *val, unsigned int bytes, struct x86_exception *fault); /* * write_emulated: Write bytes to emulated/special memory area. * @addr: [IN ] Linear address to which to write. * @val: [IN ] Value to write to memory (low-order bytes used as * required). * @bytes: [IN ] Number of bytes to write to memory. */ int (*write_emulated)(struct x86_emulate_ctxt *ctxt, unsigned long addr, const void *val, unsigned int bytes, struct x86_exception *fault); /* * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an * emulated/special memory area. * @addr: [IN ] Linear address to access. * @old: [IN ] Value expected to be current at @addr. * @new: [IN ] Value to write to @addr. * @bytes: [IN ] Number of bytes to access using CMPXCHG. */ int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, unsigned long addr, const void *old, const void *new, unsigned int bytes, struct x86_exception *fault); void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, int size, unsigned short port, void *val, unsigned int count); int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, int size, unsigned short port, const void *val, unsigned int count); bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, struct desc_struct *desc, u32 *base3, int seg); void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, struct desc_struct *desc, u32 base3, int seg); unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, int seg); void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); int (*cpl)(struct x86_emulate_ctxt *ctxt); int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest); int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt); void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase); int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc); int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); void (*halt)(struct x86_emulate_ctxt *ctxt); void (*wbinvd)(struct x86_emulate_ctxt *ctxt); int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); int (*intercept)(struct x86_emulate_ctxt *ctxt, struct x86_instruction_info *info, enum x86_intercept_stage stage); bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit); void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt); void (*set_hflags)(struct x86_emulate_ctxt *ctxt, unsigned hflags); int (*pre_leave_smm)(struct x86_emulate_ctxt *ctxt, u64 smbase); }; typedef u32 __attribute__((vector_size(16))) sse128_t; /* Type, address-of, and value of an instruction's operand. */ struct operand { enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; unsigned int bytes; unsigned int count; union { unsigned long orig_val; u64 orig_val64; }; union { unsigned long *reg; struct segmented_address { ulong ea; unsigned seg; } mem; unsigned xmm; unsigned mm; } addr; union { unsigned long val; u64 val64; char valptr[sizeof(sse128_t)]; sse128_t vec_val; u64 mm_val; void *data; }; }; struct fetch_cache { u8 data[15]; u8 *ptr; u8 *end; }; struct read_cache { u8 data[1024]; unsigned long pos; unsigned long end; }; /* Execution mode, passed to the emulator. */ enum x86emul_mode { X86EMUL_MODE_REAL, /* Real mode. */ X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ }; /* These match some of the HF_* flags defined in kvm_host.h */ #define X86EMUL_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ #define X86EMUL_SMM_MASK (1 << 6) #define X86EMUL_SMM_INSIDE_NMI_MASK (1 << 7) struct x86_emulate_ctxt { const struct x86_emulate_ops *ops; /* Register state before/after emulation. */ unsigned long eflags; unsigned long eip; /* eip before instruction emulation */ /* Emulated execution mode, represented by an X86EMUL_MODE value. */ enum x86emul_mode mode; /* interruptibility state, as a result of execution of STI or MOV SS */ int interruptibility; bool perm_ok; /* do not check permissions if true */ bool ud; /* inject an #UD if host doesn't support insn */ bool tf; /* TF value before instruction (after for syscall/sysret) */ bool have_exception; struct x86_exception exception; /* * decode cache */ /* current opcode length in bytes */ u8 opcode_len; u8 b; u8 intercept; u8 op_bytes; u8 ad_bytes; struct operand src; struct operand src2; struct operand dst; int (*execute)(struct x86_emulate_ctxt *ctxt); int (*check_perm)(struct x86_emulate_ctxt *ctxt); /* * The following six fields are cleared together, * the rest are initialized unconditionally in x86_decode_insn * or elsewhere */ bool rip_relative; u8 rex_prefix; u8 lock_prefix; u8 rep_prefix; /* bitmaps of registers in _regs[] that can be read */ u32 regs_valid; /* bitmaps of registers in _regs[] that have been written */ u32 regs_dirty; /* modrm */ u8 modrm; u8 modrm_mod; u8 modrm_reg; u8 modrm_rm; u8 modrm_seg; u8 seg_override; u64 d; unsigned long _eip; struct operand memop; /* Fields above regs are cleared together. */ unsigned long _regs[NR_VCPU_REGS]; struct operand *memopp; struct fetch_cache fetch; struct read_cache io_read; struct read_cache mem_read; }; /* Repeat String Operation Prefix */ #define REPE_PREFIX 0xf3 #define REPNE_PREFIX 0xf2 /* CPUID vendors */ #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 enum x86_intercept_stage { X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ X86_ICPT_PRE_EXCEPT, X86_ICPT_POST_EXCEPT, X86_ICPT_POST_MEMACCESS, }; enum x86_intercept { x86_intercept_none, x86_intercept_cr_read, x86_intercept_cr_write, x86_intercept_clts, x86_intercept_lmsw, x86_intercept_smsw, x86_intercept_dr_read, x86_intercept_dr_write, x86_intercept_lidt, x86_intercept_sidt, x86_intercept_lgdt, x86_intercept_sgdt, x86_intercept_lldt, x86_intercept_sldt, x86_intercept_ltr, x86_intercept_str, x86_intercept_rdtsc, x86_intercept_rdpmc, x86_intercept_pushf, x86_intercept_popf, x86_intercept_cpuid, x86_intercept_rsm, x86_intercept_iret, x86_intercept_intn, x86_intercept_invd, x86_intercept_pause, x86_intercept_hlt, x86_intercept_invlpg, x86_intercept_invlpga, x86_intercept_vmrun, x86_intercept_vmload, x86_intercept_vmsave, x86_intercept_vmmcall, x86_intercept_stgi, x86_intercept_clgi, x86_intercept_skinit, x86_intercept_rdtscp, x86_intercept_icebp, x86_intercept_wbinvd, x86_intercept_monitor, x86_intercept_mwait, x86_intercept_rdmsr, x86_intercept_wrmsr, x86_intercept_in, x86_intercept_ins, x86_intercept_out, x86_intercept_outs, nr_x86_intercepts }; /* Host execution mode. */ #if defined(CONFIG_X86_32) #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 #elif defined(CONFIG_X86_64) #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 #endif int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len); bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); #define EMULATION_FAILED -1 #define EMULATION_OK 0 #define EMULATION_RESTART 1 #define EMULATION_INTERCEPTED 2 void init_decode_cache(struct x86_emulate_ctxt *ctxt); int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); int emulator_task_switch(struct x86_emulate_ctxt *ctxt, u16 tss_selector, int idt_index, int reason, bool has_error_code, u32 error_code); int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); #endif /* _ASM_X86_KVM_X86_EMULATE_H */