OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:16 AM	rwxr-xr-x
📄 Kbuild	294 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 a.out-core.h	1.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 acenv.h	1.56 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 acpi.h	4.76 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 agp.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 alternative-asm.h	2.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 alternative.h	8.28 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 amd_nb.h	2.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 apb_timer.h	1.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 apic.h	14.53 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 apic_flat_64.h	151 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 apicdef.h	11.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 apm.h	1.8 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 arch_hweight.h	1.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 archrandom.h	3.03 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	946 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm.h	4.97 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 atomic.h	6.02 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 atomic64_32.h	8.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic64_64.h	6.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 barrier.h	3.6 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 bios_ebda.h	914 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	13.78 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 boot.h	1.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bootparam_utils.h	2.86 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 bug.h	2.07 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 bugs.h	493 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	641 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	306 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheinfo.h	209 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 calgary.h	2.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ce4100.h	121 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	133 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum_32.h	4.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum_64.h	5.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	488 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmdline.h	302 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	7.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg_32.h	3.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg_64.h	543 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 compat.h	7.37 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpu.h	975 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu_device_id.h	1.38 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpu_entry_area.h	2.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpufeature.h	7.75 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpufeatures.h	24.62 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpumask.h	408 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 crash.h	320 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📁 crypto	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 current.h	443 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 debugreg.h	2.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	208 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 desc.h	11.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 desc_defs.h	3.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	568 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 disabled-features.h	2.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 div64.h	1.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	2.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	9.58 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 dmi.h	556 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 dwarf2.h	2.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 e820	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 edac.h	474 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 efi.h	6.9 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 elf.h	10.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 emergency-restart.h	202 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry_arch.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 espfix.h	426 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 exec.h	37 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 export.h	120 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	540 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	6.04 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 floppy.h	6.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 fpu	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 frame.h	815 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	1.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 gart.h	2.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 genapic.h	22 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 geode.h	842 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	2.3 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 highmem.h	2.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hpet.h	3.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_breakpoint.h	1.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	3.85 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 hypervisor.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 i8259.h	1.93 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ia32.h	1.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ia32_unistd.h	313 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 imr.h	1.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 inat.h	6.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 inat_types.h	1013 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 init.h	632 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 insn-eval.h	837 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 insn.h	7.46 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 inst.h	5.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel-family.h	3.29 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 intel-mid.h	4.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_ds.h	793 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_mid_vrtc.h	326 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_pmc_ipc.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_pt.h	292 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_punit_ipc.h	4.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_rdt_sched.h	2.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_scu_ipc.h	2.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_telemetry.h	3.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 invpcid.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	12.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io_apic.h	5.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 iomap.h	1.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu.h	392 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 iommu_table.h	3.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 iosf_mbi.h	5.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ipi.h	2.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_regs.h	679 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_remapping.h	2.96 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 irq_vectors.h	4.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_work.h	397 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqdomain.h	1.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	4.38 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ist.h	735 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	2.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kasan.h	966 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kaslr.h	424 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kbdleds.h	454 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	752 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec-bzimage64.h	189 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	6.69 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 kgdb.h	2.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	289 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	3.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_emulate.h	15.23 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 kvm_guest.h	172 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_host.h	42.72 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 kvm_page_track.h	2.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_para.h	3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvmclock.h	170 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	581 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 livepatch.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	3.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 local64.h	33 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mach_timer.h	1.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mach_traps.h	1013 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 math_emu.h	395 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc.h	2.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mce.h	12.54 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mem_encrypt.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 microcode.h	4.14 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 microcode_amd.h	1.41 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 microcode_intel.h	2.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 misc.h	143 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmconfig.h	374 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	10.27 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mmx.h	337 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	129 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone_32.h	1.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone_64.h	430 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	2.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mpspec.h	3.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mpspec_def.h	3.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mpx.h	2.97 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mshyperv.h	10.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msi.h	392 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 msidef.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msr-index.h	30.36 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 msr-trace.h	1.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msr.h	10.85 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mtrr.h	4.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mwait.h	3.74 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 nmi.h	1.39 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 nops.h	4.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 nospec-branch.h	10.87 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 numa.h	2.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 numa_32.h	256 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 numachip	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 olpc.h	3.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 olpc_ofw.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 orc_lookup.h	1.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 orc_types.h	3.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_32.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page_32_types.h	1.7 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 page_64.h	1.42 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 page_64_types.h	2.34 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 page_types.h	2.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 paravirt.h	23.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 paravirt_types.h	22.15 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 parport.h	314 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pat.h	768 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 pci-direct.h	995 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 pci-functions.h	654 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	3.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci_64.h	684 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci_x86.h	5.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	18.97 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 perf_event.h	8.82 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 perf_event_p4.h	26.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	5.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-2level.h	2.75 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable-2level_types.h	867 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable-3level.h	10.24 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable-3level_types.h	1.06 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable-invert.h	1.07 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable.h	33.91 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable_32.h	3.1 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable_32_types.h	2.01 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable_64.h	7.37 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable_64_types.h	3.67 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable_types.h	16.75 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pkeys.h	3.17 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 platform_sst_audio.h	3.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pm-trace.h	611 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 posix_types.h	144 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 preempt.h	3.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 probe_roms.h	273 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor-cyrix.h	879 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor-flags.h	1.71 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 processor.h	24.54 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 prom.h	1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 proto.h	1003 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 pti.h	369 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 ptrace.h	8.52 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 purgatory.h	571 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pvclock-abi.h	1.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pvclock.h	2.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 qrwlock.h	199 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 qspinlock.h	2.54 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 qspinlock_paravirt.h	1.85 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 realmode.h	1.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 reboot.h	850 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 reboot_fixups.h	183 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 refcount.h	2.83 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 required-features.h	2.81 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 rio.h	2.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rmwcc.h	1.62 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 rwsem.h	7.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 seccomp.h	510 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	465 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 segment.h	9.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 set_memory.h	3.86 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 setup.h	3.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup_arch.h	77 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	193 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sigcontext.h	261 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sigframe.h	2.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sighandling.h	649 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	2.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 simd.h	287 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smap.h	1.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	4.73 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 sparsemem.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spec-ctrl.h	2.81 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 special_insns.h	5.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	719 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sta2x11.h	352 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	4.13 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 stacktrace.h	2.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	129 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string_32.h	7.74 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 string_64.h	3.56 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 suspend.h	131 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 suspend_32.h	822 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 suspend_64.h	1.79 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 svm.h	7.06 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 swiotlb.h	991 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	2.98 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 sync_bitops.h	3.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sys_ia32.h	1.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	5.14 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 syscalls.h	1.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sysfb.h	2.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tce.h	1.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 text-patching.h	2.3 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 thread_info.h	9.33 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 time.h	331 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 timer.h	1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	546 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	1.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbbatch.h	332 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	17.09 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 topology.h	4.84 KB	11/01/2022 04:52:05 PM	rw-r--r--
📁 trace	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 trace_clock.h	406 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	5.74 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tsc.h	1.93 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 uaccess.h	21.69 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 uaccess_32.h	1.54 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 uaccess_64.h	5.32 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 umip.h	329 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	345 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	1.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	3.13 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 unwind_hints.h	3.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	2.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user32.h	2.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user_32.h	4.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 user_64.h	5.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 uv	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 vdso.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	740 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vgtod.h	2.13 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 virtext.h	2.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vm86.h	2.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vmx.h	23.5 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 vsyscall.h	635 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 vvar.h	1.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 word-at-a-time.h	2.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 x86_init.h	9.25 KB	11/01/2022 04:52:05 PM	rw-r--r--
📁 xen	-	11/17/2022 06:42:22 AM	rwxr-xr-x
📄 xor.h	10.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor_32.h	14.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor_64.h	716 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor_avx.h	4.5 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: desc.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_DESC_H
#define _ASM_X86_DESC_H

#include <asm/desc_defs.h>
#include <asm/ldt.h>
#include <asm/mmu.h>
#include <asm/fixmap.h>
#include <asm/irq_vectors.h>
#include <asm/cpu_entry_area.h>

#include <linux/smp.h>
#include <linux/percpu.h>

static inline void fill_ldt(struct desc_struct *desc, const struct user_desc *info)
{
	desc->limit0		= info->limit & 0x0ffff;

desc->base0		= (info->base_addr & 0x0000ffff);
	desc->base1		= (info->base_addr & 0x00ff0000) >> 16;

desc->type		= (info->read_exec_only ^ 1) << 1;
	desc->type	       |= info->contents << 2;
	/* Set the ACCESS bit so it can be mapped RO */
	desc->type	       |= 1;

desc->s			= 1;
	desc->dpl		= 0x3;
	desc->p			= info->seg_not_present ^ 1;
	desc->limit1		= (info->limit & 0xf0000) >> 16;
	desc->avl		= info->useable;
	desc->d			= info->seg_32bit;
	desc->g			= info->limit_in_pages;

desc->base2		= (info->base_addr & 0xff000000) >> 24;
	/*
	 * Don't allow setting of the lm bit. It would confuse
	 * user_64bit_mode and would get overridden by sysret anyway.
	 */
	desc->l			= 0;
}

extern struct desc_ptr idt_descr;
extern gate_desc idt_table[];
extern const struct desc_ptr debug_idt_descr;
extern gate_desc debug_idt_table[];

struct gdt_page {
	struct desc_struct gdt[GDT_ENTRIES];
} __attribute__((aligned(PAGE_SIZE)));

DECLARE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page);

/* Provide the original GDT */
static inline struct desc_struct *get_cpu_gdt_rw(unsigned int cpu)
{
	return per_cpu(gdt_page, cpu).gdt;
}

/* Provide the current original GDT */
static inline struct desc_struct *get_current_gdt_rw(void)
{
	return this_cpu_ptr(&gdt_page)->gdt;
}

/* Provide the fixmap address of the remapped GDT */
static inline struct desc_struct *get_cpu_gdt_ro(int cpu)
{
	return (struct desc_struct *)&get_cpu_entry_area(cpu)->gdt;
}

/* Provide the current read-only GDT */
static inline struct desc_struct *get_current_gdt_ro(void)
{
	return get_cpu_gdt_ro(smp_processor_id());
}

/* Provide the physical address of the GDT page. */
static inline phys_addr_t get_cpu_gdt_paddr(unsigned int cpu)
{
	return per_cpu_ptr_to_phys(get_cpu_gdt_rw(cpu));
}

static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func,
			     unsigned dpl, unsigned ist, unsigned seg)
{
	gate->offset_low	= (u16) func;
	gate->bits.p		= 1;
	gate->bits.dpl		= dpl;
	gate->bits.zero		= 0;
	gate->bits.type		= type;
	gate->offset_middle	= (u16) (func >> 16);
#ifdef CONFIG_X86_64
	gate->segment		= __KERNEL_CS;
	gate->bits.ist		= ist;
	gate->reserved		= 0;
	gate->offset_high	= (u32) (func >> 32);
#else
	gate->segment		= seg;
	gate->bits.ist		= 0;
#endif
}

static inline int desc_empty(const void *ptr)
{
	const u32 *desc = ptr;

return !(desc[0] | desc[1]);
}

#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else
#define load_TR_desc()				native_load_tr_desc()
#define load_gdt(dtr)				native_load_gdt(dtr)
#define load_idt(dtr)				native_load_idt(dtr)
#define load_tr(tr)				asm volatile("ltr %0"::"m" (tr))
#define load_ldt(ldt)				asm volatile("lldt %0"::"m" (ldt))

#define store_gdt(dtr)				native_store_gdt(dtr)
#define store_tr(tr)				(tr = native_store_tr())

#define load_TLS(t, cpu)			native_load_tls(t, cpu)
#define set_ldt					native_set_ldt

#define write_ldt_entry(dt, entry, desc)	native_write_ldt_entry(dt, entry, desc)
#define write_gdt_entry(dt, entry, desc, type)	native_write_gdt_entry(dt, entry, desc, type)
#define write_idt_entry(dt, entry, g)		native_write_idt_entry(dt, entry, g)

static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
{
}

static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
{
}
#endif	/* CONFIG_PARAVIRT */

#define store_ldt(ldt) asm("sldt %0" : "=m"(ldt))

static inline void native_write_idt_entry(gate_desc *idt, int entry, const gate_desc *gate)
{
	memcpy(&idt[entry], gate, sizeof(*gate));
}

static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry, const void *desc)
{
	memcpy(&ldt[entry], desc, 8);
}

static inline void
native_write_gdt_entry(struct desc_struct *gdt, int entry, const void *desc, int type)
{
	unsigned int size;

switch (type) {
	case DESC_TSS:	size = sizeof(tss_desc);	break;
	case DESC_LDT:	size = sizeof(ldt_desc);	break;
	default:	size = sizeof(*gdt);		break;
	}

memcpy(&gdt[entry], desc, size);
}

static inline void set_tssldt_descriptor(void *d, unsigned long addr,
					 unsigned type, unsigned size)
{
	struct ldttss_desc *desc = d;

memset(desc, 0, sizeof(*desc));

desc->limit0		= (u16) size;
	desc->base0		= (u16) addr;
	desc->base1		= (addr >> 16) & 0xFF;
	desc->type		= type;
	desc->p			= 1;
	desc->limit1		= (size >> 16) & 0xF;
	desc->base2		= (addr >> 24) & 0xFF;
#ifdef CONFIG_X86_64
	desc->base3		= (u32) (addr >> 32);
#endif
}

static inline void __set_tss_desc(unsigned cpu, unsigned int entry, struct x86_hw_tss *addr)
{
	struct desc_struct *d = get_cpu_gdt_rw(cpu);
	tss_desc tss;

set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS,
			      __KERNEL_TSS_LIMIT);
	write_gdt_entry(d, entry, &tss, DESC_TSS);
}

#define set_tss_desc(cpu, addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)

static inline void native_set_ldt(const void *addr, unsigned int entries)
{
	if (likely(entries == 0))
		asm volatile("lldt %w0"::"q" (0));
	else {
		unsigned cpu = smp_processor_id();
		ldt_desc ldt;

set_tssldt_descriptor(&ldt, (unsigned long)addr, DESC_LDT,
				      entries * LDT_ENTRY_SIZE - 1);
		write_gdt_entry(get_cpu_gdt_rw(cpu), GDT_ENTRY_LDT,
				&ldt, DESC_LDT);
		asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
	}
}

static inline void native_load_gdt(const struct desc_ptr *dtr)
{
	asm volatile("lgdt %0"::"m" (*dtr));
}

static inline void native_load_idt(const struct desc_ptr *dtr)
{
	asm volatile("lidt %0"::"m" (*dtr));
}

static inline void native_store_gdt(struct desc_ptr *dtr)
{
	asm volatile("sgdt %0":"=m" (*dtr));
}

static inline void store_idt(struct desc_ptr *dtr)
{
	asm volatile("sidt %0":"=m" (*dtr));
}

/*
 * The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is
 * a read-only remapping. To prevent a page fault, the GDT is switched to the
 * original writeable version when needed.
 */
#ifdef CONFIG_X86_64
static inline void native_load_tr_desc(void)
{
	struct desc_ptr gdt;
	int cpu = raw_smp_processor_id();
	bool restore = 0;
	struct desc_struct *fixmap_gdt;

native_store_gdt(&gdt);
	fixmap_gdt = get_cpu_gdt_ro(cpu);

/*
	 * If the current GDT is the read-only fixmap, swap to the original
	 * writeable version. Swap back at the end.
	 */
	if (gdt.address == (unsigned long)fixmap_gdt) {
		load_direct_gdt(cpu);
		restore = 1;
	}
	asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
	if (restore)
		load_fixmap_gdt(cpu);
}
#else
static inline void native_load_tr_desc(void)
{
	asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
}
#endif

static inline unsigned long native_store_tr(void)
{
	unsigned long tr;

asm volatile("str %0":"=r" (tr));

return tr;
}

static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
{
	struct desc_struct *gdt = get_cpu_gdt_rw(cpu);
	unsigned int i;

for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
		gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
}

DECLARE_PER_CPU(bool, __tss_limit_invalid);

static inline void force_reload_TR(void)
{
	struct desc_struct *d = get_current_gdt_rw();
	tss_desc tss;

memcpy(&tss, &d[GDT_ENTRY_TSS], sizeof(tss_desc));

/*
	 * LTR requires an available TSS, and the TSS is currently
	 * busy.  Make it be available so that LTR will work.
	 */
	tss.type = DESC_TSS;
	write_gdt_entry(d, GDT_ENTRY_TSS, &tss, DESC_TSS);

load_TR_desc();
	this_cpu_write(__tss_limit_invalid, false);
}

/*
 * Call this if you need the TSS limit to be correct, which should be the case
 * if and only if you have TIF_IO_BITMAP set or you're switching to a task
 * with TIF_IO_BITMAP set.
 */
static inline void refresh_tss_limit(void)
{
	DEBUG_LOCKS_WARN_ON(preemptible());

if (unlikely(this_cpu_read(__tss_limit_invalid)))
		force_reload_TR();
}

/*
 * If you do something evil that corrupts the cached TSS limit (I'm looking
 * at you, VMX exits), call this function.
 *
 * The optimization here is that the TSS limit only matters for Linux if the
 * IO bitmap is in use.  If the TSS limit gets forced to its minimum value,
 * everything works except that IO bitmap will be ignored and all CPL 3 IO
 * instructions will #GP, which is exactly what we want for normal tasks.
 */
static inline void invalidate_tss_limit(void)
{
	DEBUG_LOCKS_WARN_ON(preemptible());

if (unlikely(test_thread_flag(TIF_IO_BITMAP)))
		force_reload_TR();
	else
		this_cpu_write(__tss_limit_invalid, true);
}

/* This intentionally ignores lm, since 32-bit apps don't have that field. */
#define LDT_empty(info)					\
	((info)->base_addr		== 0	&&	\
	 (info)->limit			== 0	&&	\
	 (info)->contents		== 0	&&	\
	 (info)->read_exec_only		== 1	&&	\
	 (info)->seg_32bit		== 0	&&	\
	 (info)->limit_in_pages		== 0	&&	\
	 (info)->seg_not_present	== 1	&&	\
	 (info)->useable		== 0)

/* Lots of programs expect an all-zero user_desc to mean "no segment at all". */
static inline bool LDT_zero(const struct user_desc *info)
{
	return (info->base_addr		== 0 &&
		info->limit		== 0 &&
		info->contents		== 0 &&
		info->read_exec_only	== 0 &&
		info->seg_32bit		== 0 &&
		info->limit_in_pages	== 0 &&
		info->seg_not_present	== 0 &&
		info->useable		== 0);
}

static inline void clear_LDT(void)
{
	set_ldt(NULL, 0);
}

static inline unsigned long get_desc_base(const struct desc_struct *desc)
{
	return (unsigned)(desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24));
}

static inline void set_desc_base(struct desc_struct *desc, unsigned long base)
{
	desc->base0 = base & 0xffff;
	desc->base1 = (base >> 16) & 0xff;
	desc->base2 = (base >> 24) & 0xff;
}

static inline unsigned long get_desc_limit(const struct desc_struct *desc)
{
	return desc->limit0 | (desc->limit1 << 16);
}

static inline void set_desc_limit(struct desc_struct *desc, unsigned long limit)
{
	desc->limit0 = limit & 0xffff;
	desc->limit1 = (limit >> 16) & 0xf;
}

void update_intr_gate(unsigned int n, const void *addr);
void alloc_intr_gate(unsigned int n, const void *addr);

extern unsigned long system_vectors[];

#ifdef CONFIG_X86_64
DECLARE_PER_CPU(u32, debug_idt_ctr);
static inline bool is_debug_idt_enabled(void)
{
	if (this_cpu_read(debug_idt_ctr))
		return true;

return false;
}

static inline void load_debug_idt(void)
{
	load_idt((const struct desc_ptr *)&debug_idt_descr);
}
#else
static inline bool is_debug_idt_enabled(void)
{
	return false;
}

static inline void load_debug_idt(void)
{
}
#endif

/*
 * The load_current_idt() must be called with interrupts disabled
 * to avoid races. That way the IDT will always be set back to the expected
 * descriptor. It's also called when a CPU is being initialized, and
 * that doesn't need to disable interrupts, as nothing should be
 * bothering the CPU then.
 */
static inline void load_current_idt(void)
{
	if (is_debug_idt_enabled())
		load_debug_idt();
	else
		load_idt((const struct desc_ptr *)&idt_descr);
}

extern void idt_setup_early_handler(void);
extern void idt_setup_early_traps(void);
extern void idt_setup_traps(void);
extern void idt_setup_apic_and_irq_gates(void);

#ifdef CONFIG_X86_64
extern void idt_setup_early_pf(void);
extern void idt_setup_ist_traps(void);
extern void idt_setup_debugidt_traps(void);
#else
static inline void idt_setup_early_pf(void) { }
static inline void idt_setup_ist_traps(void) { }
static inline void idt_setup_debugidt_traps(void) { }
#endif

extern void idt_invalidate(void *addr);

#endif /* _ASM_X86_DESC_H */