OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	577 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 abi.h	853 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 addrspace.h	4.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 amon.h	409 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 arch_hweight.h	792 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-eva.h	6.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	197 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm.h	8.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro-32.h	2.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro-64.h	1.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmmacro.h	14.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	19.73 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 barrier.h	8.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bcache.h	2.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	15.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitrev.h	608 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bmips-spaces.h	268 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bmips.h	3.45 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 bootinfo.h	5.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 branch.h	2.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 break.h	787 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	759 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	944 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	546 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	4.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheops.h	3.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cdmm.h	3.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cevt-r4k.h	823 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	6.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clock.h	997 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 clocksource.h	884 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmp.h	492 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	5.28 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 compat-signal.h	640 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 compat.h	6.66 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 compiler.h	2.96 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cop2.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu-features.h	19.46 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpu-info.h	5.84 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpu-type.h	4.13 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpu.h	15.54 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cpufeature.h	717 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 debug.h	654 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 dec	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 delay.h	841 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	347 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	2.17 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 dma-coherence.h	813 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	981 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	9.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ds1287.h	1019 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dsemul.h	3.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dsp.h	1.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 edac.h	819 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	15.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 emma	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 errno.h	429 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 eva.h	796 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 exec.h	579 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	241 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	372 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	2.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpregdef.h	2.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu.h	5.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu_emulator.h	5.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	2.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	4.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 fw	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 gio_device.h	1.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 gt64120.h	19.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	544 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hazards.h	8.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 highmem.h	1.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hpet.h	1.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	2.76 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 hw_irq.h	475 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 i8259.h	2.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	330 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 idle.h	689 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 inst.h	2.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	18.44 KB	11/01/2022 04:52:05 PM	rw-r--r--
📁 ip32	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 irq.h	2.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_cpu.h	708 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_gt641xx.h	2.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_regs.h	744 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	4.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 isa-rev.h	556 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 isadep.h	603 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 jazz.h	8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jazzdma.h	2.97 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jump_label.h	1.4 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 kdebug.h	303 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kexec.h	1.53 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 kgdb.h	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	221 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kvm_host.h	37.88 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 kvm_para.h	2.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 lasat	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 linkage.h	306 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 llsc.h	623 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	4.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 m48t37.h	732 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 maar.h	4.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 mach-ar7	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ath25	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ath79	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-au1x00	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-bcm47xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-bcm63xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-bmips	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-cavium-octeon	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-cobalt	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-db1x00	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-dec	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-emma2rh	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-generic	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ip22	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ip27	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ip28	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ip32	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-jazz	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-jz4740	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-lantiq	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-lasat	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-loongson32	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-loongson64	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-malta	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-netlogic	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-paravirt	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-pic32	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-pistachio	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-pmcs-msp71xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-pnx833x	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-ralink	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-rc32434	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-rm	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-sibyte	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-tx39xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-tx49xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-vr41xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📁 mach-xilfpga	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 machine.h	2.93 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mc146818-time.h	3.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc.h	450 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 mips-boards	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 mips-cm.h	15.86 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mips-cpc.h	5.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mips-cps.h	6.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mips-gic.h	12.3 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mips-r2-to-r6-emul.h	2.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mips_machine.h	1.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mips_mt.h	707 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mipsmtregs.h	10.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mipsprom.h	2.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mipsregs.h	88.1 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mmu.h	550 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 mmu_context.h	5.41 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mmzone.h	561 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 module.h	4.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msa.h	8.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 msc01_ic.h	6.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 netlogic	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 nile4.h	10.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 octeon	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 paccess.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	7.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 pci	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 pci.h	4.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	482 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	3.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable-32.h	7.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable-64.h	10.87 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pgtable-bits.h	7.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	17.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pm-cps.h	1.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pm.h	3.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pmon.h	1.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 prefetch.h	2.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	11.71 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 prom.h	845 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	5.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 r4k-timer.h	604 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 r4kcache.h	26.34 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 reboot.h	440 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 reg.h	26 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 regdef.h	2.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rtlx.h	2.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 seccomp.h	800 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	607 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	884 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📁 sgi	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 sgialib.h	2.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sgiarcs.h	15.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	352 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📁 sibyte	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 sigcontext.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sim.h	2.32 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp-cps.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp-ops.h	2.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	3.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📁 sn	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 sni.h	7.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 socket.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sparsemem.h	486 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	459 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	188 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spram.h	262 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackframe.h	10.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stackprotector.h	1.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	2.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	4.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	3.57 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 termios.h	2.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	6.63 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 time.h	2.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	2.87 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbdebug.h	403 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbex.h	788 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbmisc.h	320 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	619 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	1.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 txx9	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 txx9irq.h	743 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 txx9pio.h	592 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 txx9tmr.h	1.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	487 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	22.2 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 uasm.h	9.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uprobes.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vdso.h	3.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	1.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vpe.h	2.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 vr41xx	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 war.h	7.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 watch.h	827 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 wbflush.h	694 bytes	01/28/2018 09:20:33 PM	rw-r--r--
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Editing: pgtable-32.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
 */
#ifndef _ASM_PGTABLE_32_H
#define _ASM_PGTABLE_32_H

#include <asm/addrspace.h>
#include <asm/page.h>

#include <linux/linkage.h>
#include <asm/cachectl.h>
#include <asm/fixmap.h>

#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h>

#ifdef CONFIG_HIGHMEM
#include <asm/highmem.h>
#endif

extern int temp_tlb_entry;

/*
 * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
 *	starting at the top and working down. This is for populating the
 *	TLB before trap_init() puts the TLB miss handler in place. It
 *	should be used only for entries matching the actual page tables,
 *	to prevent inconsistencies.
 */
extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
			       unsigned long entryhi, unsigned long pagemask);

/*
 * Basically we have the same two-level (which is the logical three level
 * Linux page table layout folded) page tables as the i386.  Some day
 * when we have proper page coloring support we can have a 1% quicker
 * tlb refill handling mechanism, but for now it is a bit slower but
 * works even with the cache aliasing problem the R4k and above have.
 */

/* PGDIR_SHIFT determines what a third-level page table entry can map */
#define PGDIR_SHIFT	(2 * PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2)
#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
#define PGDIR_MASK	(~(PGDIR_SIZE-1))

/*
 * Entries per page directory level: we use two-level, so
 * we don't really have any PUD/PMD directory physically.
 */
#define __PGD_ORDER	(32 - 3 * PAGE_SHIFT + PGD_T_LOG2 + PTE_T_LOG2)
#define PGD_ORDER	(__PGD_ORDER >= 0 ? __PGD_ORDER : 0)
#define PUD_ORDER	aieeee_attempt_to_allocate_pud
#define PMD_ORDER	1
#define PTE_ORDER	0

#define PTRS_PER_PGD	(USER_PTRS_PER_PGD * 2)
#define PTRS_PER_PTE	((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))

#define USER_PTRS_PER_PGD	(0x80000000UL/PGDIR_SIZE)
#define FIRST_USER_ADDRESS	0UL

#define VMALLOC_START	  MAP_BASE

#define PKMAP_END	((FIXADDR_START) & ~((LAST_PKMAP << PAGE_SHIFT)-1))
#define PKMAP_BASE	(PKMAP_END - PAGE_SIZE * LAST_PKMAP)

#ifdef CONFIG_HIGHMEM
# define VMALLOC_END	(PKMAP_BASE-2*PAGE_SIZE)
#else
# define VMALLOC_END	(FIXADDR_START-2*PAGE_SIZE)
#endif

#ifdef CONFIG_PHYS_ADDR_T_64BIT
#define pte_ERROR(e) \
	printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
#else
#define pte_ERROR(e) \
	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#endif
#define pgd_ERROR(e) \
	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))

extern void load_pgd(unsigned long pg_dir);

extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];

/*
 * Empty pgd/pmd entries point to the invalid_pte_table.
 */
static inline int pmd_none(pmd_t pmd)
{
	return pmd_val(pmd) == (unsigned long) invalid_pte_table;
}

#define pmd_bad(pmd)		(pmd_val(pmd) & ~PAGE_MASK)

static inline int pmd_present(pmd_t pmd)
{
	return pmd_val(pmd) != (unsigned long) invalid_pte_table;
}

static inline void pmd_clear(pmd_t *pmdp)
{
	pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
}

#if defined(CONFIG_XPA)

#define MAX_POSSIBLE_PHYSMEM_BITS 40
#define pte_pfn(x)		(((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT))
static inline pte_t
pfn_pte(unsigned long pfn, pgprot_t prot)
{
	pte_t pte;

pte.pte_low = (pfn >> _PAGE_PRESENT_SHIFT) |
				(pgprot_val(prot) & ~_PFNX_MASK);
	pte.pte_high = (pfn << _PFN_SHIFT) |
				(pgprot_val(prot) & ~_PFN_MASK);
	return pte;
}

#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)

#define MAX_POSSIBLE_PHYSMEM_BITS 36
#define pte_pfn(x)		((unsigned long)((x).pte_high >> 6))

static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
{
	pte_t pte;

pte.pte_high = (pfn << 6) | (pgprot_val(prot) & 0x3f);
	pte.pte_low = pgprot_val(prot);

return pte;
}

#else

#define MAX_POSSIBLE_PHYSMEM_BITS 32
#ifdef CONFIG_CPU_VR41XX
#define pte_pfn(x)		((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
#define pfn_pte(pfn, prot)	__pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
#else
#define pte_pfn(x)		((unsigned long)((x).pte >> _PFN_SHIFT))
#define pfn_pte(pfn, prot)	__pte(((unsigned long long)(pfn) << _PFN_SHIFT) | pgprot_val(prot))
#endif
#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) */

#define pte_page(x)		pfn_to_page(pte_pfn(x))

#define __pgd_offset(address)	pgd_index(address)
#define __pud_offset(address)	(((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
#define __pmd_offset(address)	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))

/* to find an entry in a kernel page-table-directory */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)

#define pgd_index(address)	(((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))

/* to find an entry in a page-table-directory */
#define pgd_offset(mm, addr)	((mm)->pgd + pgd_index(addr))

/* Find an entry in the third-level page table.. */
#define __pte_offset(address)						\
	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
#define pte_offset(dir, address)					\
	((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
#define pte_offset_kernel(dir, address)					\
	((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))

#define pte_offset_map(dir, address)					\
	((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
#define pte_unmap(pte) ((void)(pte))

#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)

/* Swap entries must have VALID bit cleared. */
#define __swp_type(x)			(((x).val >> 10) & 0x1f)
#define __swp_offset(x)			((x).val >> 15)
#define __swp_entry(type,offset)	((swp_entry_t) { ((type) << 10) | ((offset) << 15) })
#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x)		((pte_t) { (x).val })

#else

#if defined(CONFIG_XPA)

/* Swap entries must have VALID and GLOBAL bits cleared. */
#define __swp_type(x)			(((x).val >> 4) & 0x1f)
#define __swp_offset(x)			 ((x).val >> 9)
#define __swp_entry(type,offset)	((swp_entry_t)  { ((type) << 4) | ((offset) << 9) })
#define __pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_high })
#define __swp_entry_to_pte(x)		((pte_t) { 0, (x).val })

#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)

/* Swap entries must have VALID and GLOBAL bits cleared. */
#define __swp_type(x)			(((x).val >> 2) & 0x1f)
#define __swp_offset(x)			 ((x).val >> 7)
#define __swp_entry(type, offset)	((swp_entry_t)  { ((type) << 2) | ((offset) << 7) })
#define __pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_high })
#define __swp_entry_to_pte(x)		((pte_t) { 0, (x).val })

#else
/*
 * Constraints:
 *      _PAGE_PRESENT at bit 0
 *      _PAGE_MODIFIED at bit 4
 *      _PAGE_GLOBAL at bit 6
 *      _PAGE_VALID at bit 7
 */
#define __swp_type(x)			(((x).val >> 8) & 0x1f)
#define __swp_offset(x)			 ((x).val >> 13)
#define __swp_entry(type,offset)	((swp_entry_t)	{ ((type) << 8) | ((offset) << 13) })
#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x)		((pte_t) { (x).val })

#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) */

#endif /* defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) */

#endif /* _ASM_PGTABLE_32_H */