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11/17/2022 06:42:15 AM
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Kbuild
658 bytes
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asm-offsets.h
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atomic.h
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barrier.h
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bfin-global.h
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bfin-lq035q1.h
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bfin5xx_spi.h
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bfin_can.h
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bfin_dma.h
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bfin_pfmon.h
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bfin_ppi.h
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bfin_sdh.h
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bfin_serial.h
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bfin_simple_timer.h
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bfin_sport.h
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bfin_sport3.h
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bfin_twi.h
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bfin_watchdog.h
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bfrom.h
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bitops.h
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blackfin.h
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bug.h
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cache.h
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cacheflush.h
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cdef_LPBlackfin.h
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checksum.h
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clkdev.h
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clocks.h
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cmpxchg.h
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context.S
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cplb.h
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cplbinit.h
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cpu.h
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def_LPBlackfin.h
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delay.h
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dma-mapping.h
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dma.h
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dpmc.h
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early_printk.h
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elf.h
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entry.h
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exec.h
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fixed_code.h
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flat.h
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ftrace.h
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gpio.h
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gptimers.h
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hardirq.h
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io.h
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ipipe.h
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ipipe_base.h
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irq.h
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irq_handler.h
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irqflags.h
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kgdb.h
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l1layout.h
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linkage.h
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mem_init.h
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mem_map.h
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mmu.h
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mmu_context.h
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module.h
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nand.h
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nmi.h
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page.h
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page_offset.h
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pci.h
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pda.h
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perf_event.h
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pgtable.h
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pm.h
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portmux.h
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processor.h
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pseudo_instructions.h
391 bytes
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ptrace.h
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reboot.h
446 bytes
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rwlock.h
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scb.h
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sections.h
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segment.h
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smp.h
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spinlock.h
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spinlock_types.h
495 bytes
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string.h
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switch_to.h
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syscall.h
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thread_info.h
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time.h
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timex.h
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tlb.h
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tlbflush.h
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trace.h
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traps.h
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uaccess.h
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unistd.h
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vga.h
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Editing: bfrom.h
Close
/* Blackfin on-chip ROM API * * Copyright 2008 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef __BFROM_H__ #define __BFROM_H__ #include <linux/types.h> /* Possible syscontrol action flags */ #define SYSCTRL_READ 0x00000000 /* read registers */ #define SYSCTRL_WRITE 0x00000001 /* write registers */ #define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */ #define SYSCTRL_CORERESET 0x00000004 /* perform core reset */ #define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */ #define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */ #define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */ #define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */ #define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */ #define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */ #define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */ #define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */ #define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */ typedef struct ADI_SYSCTRL_VALUES { uint16_t uwVrCtl; uint16_t uwPllCtl; uint16_t uwPllDiv; uint16_t uwPllLockCnt; uint16_t uwPllStat; } ADI_SYSCTRL_VALUES; static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)0xEF000038; /* We need a dedicated function since we need to screw with the stack pointer * when resetting. The on-chip ROM will save/restore registers on the stack * when doing a system reset, so the stack cannot be outside of the chip. */ __attribute__((__noreturn__)) static inline void bfrom_SoftReset(void *new_stack) { while (1) /* * We don't declare the SP as clobbered on purpose, since * it confuses the heck out of the compiler, and this function * never returns */ __asm__ __volatile__( "sp = %[stack];" "jump (%[bfrom_syscontrol]);" : : [bfrom_syscontrol] "p"(bfrom_SysControl), "q0"(SYSCTRL_SOFTRESET), "q1"(0), "q2"(NULL), [stack] "p"(new_stack) ); } /* OTP Functions */ static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018; static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001A; static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001C; /* otp command: defines for "command" */ #define OTP_INIT 0x00000001 #define OTP_CLOSE 0x00000002 /* otp read/write: defines for "flags" */ #define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */ #define OTP_UPPER_HALF 0x00000001 #define OTP_NO_ECC 0x00000010 /* do not use ECC */ #define OTP_LOCK 0x00000020 /* sets page protection bit for page */ #define OTP_CHECK_FOR_PREV_WRITE 0x00000080 /* Return values for all functions */ #define OTP_SUCCESS 0x00000000 #define OTP_MASTER_ERROR 0x001 #define OTP_WRITE_ERROR 0x003 #define OTP_READ_ERROR 0x005 #define OTP_ACC_VIO_ERROR 0x009 #define OTP_DATA_MULT_ERROR 0x011 #define OTP_ECC_MULT_ERROR 0x021 #define OTP_PREV_WR_ERROR 0x041 #define OTP_DATA_SB_WARN 0x100 #define OTP_ECC_SB_WARN 0x200 #endif