OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 8250.S	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm9260.S	753 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 at91.S	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bcm63xx.S	748 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 brcmstb.S	4.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 clps711x.S	935 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dc21285.S	950 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 digicolor.S	756 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 efm32.S	1.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 exynos.S	1.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 icedcc.S	1.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 imx-uart.h	5.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 imx.S	1.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ks8695.S	1.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 meson.S	878 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 msm.S	1.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 netx.S	795 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 omap2plus.S	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 palmchip.S	199 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pl01x.S	1004 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 renesas-scif.S	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 s3c24xx.S	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 s5pv210.S	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sa1100.S	1.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 samsung.S	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sirf.S	824 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sti.S	1.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tegra.S	6.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uncompress.h	222 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ux500.S	1.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vexpress.S	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vf.S	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vt8500.S	881 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 zynq.S	1.61 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: imx-uart.h

/*
 * Copyright (C) 2012-2015 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __DEBUG_IMX_UART_H
#define __DEBUG_IMX_UART_H

#define IMX1_UART1_BASE_ADDR	0x00206000
#define IMX1_UART2_BASE_ADDR	0x00207000
#define IMX1_UART_BASE_ADDR(n)	IMX1_UART##n##_BASE_ADDR
#define IMX1_UART_BASE(n)	IMX1_UART_BASE_ADDR(n)

#define IMX21_UART1_BASE_ADDR	0x1000a000
#define IMX21_UART2_BASE_ADDR	0x1000b000
#define IMX21_UART3_BASE_ADDR	0x1000c000
#define IMX21_UART4_BASE_ADDR	0x1000d000
#define IMX21_UART_BASE_ADDR(n)	IMX21_UART##n##_BASE_ADDR
#define IMX21_UART_BASE(n)	IMX21_UART_BASE_ADDR(n)

#define IMX25_UART1_BASE_ADDR	0x43f90000
#define IMX25_UART2_BASE_ADDR	0x43f94000
#define IMX25_UART3_BASE_ADDR	0x5000c000
#define IMX25_UART4_BASE_ADDR	0x50008000
#define IMX25_UART5_BASE_ADDR	0x5002c000
#define IMX25_UART_BASE_ADDR(n)	IMX25_UART##n##_BASE_ADDR
#define IMX25_UART_BASE(n)	IMX25_UART_BASE_ADDR(n)

#define IMX31_UART1_BASE_ADDR	0x43f90000
#define IMX31_UART2_BASE_ADDR	0x43f94000
#define IMX31_UART3_BASE_ADDR	0x5000c000
#define IMX31_UART4_BASE_ADDR	0x43fb0000
#define IMX31_UART5_BASE_ADDR	0x43fb4000
#define IMX31_UART_BASE_ADDR(n)	IMX31_UART##n##_BASE_ADDR
#define IMX31_UART_BASE(n)	IMX31_UART_BASE_ADDR(n)

#define IMX35_UART1_BASE_ADDR	0x43f90000
#define IMX35_UART2_BASE_ADDR	0x43f94000
#define IMX35_UART3_BASE_ADDR	0x5000c000
#define IMX35_UART_BASE_ADDR(n)	IMX35_UART##n##_BASE_ADDR
#define IMX35_UART_BASE(n)	IMX35_UART_BASE_ADDR(n)

#define IMX50_UART1_BASE_ADDR	0x53fbc000
#define IMX50_UART2_BASE_ADDR	0x53fc0000
#define IMX50_UART3_BASE_ADDR	0x5000c000
#define IMX50_UART4_BASE_ADDR	0x53ff0000
#define IMX50_UART5_BASE_ADDR	0x63f90000
#define IMX50_UART_BASE_ADDR(n)	IMX50_UART##n##_BASE_ADDR
#define IMX50_UART_BASE(n)	IMX50_UART_BASE_ADDR(n)

#define IMX51_UART1_BASE_ADDR	0x73fbc000
#define IMX51_UART2_BASE_ADDR	0x73fc0000
#define IMX51_UART3_BASE_ADDR	0x7000c000
#define IMX51_UART_BASE_ADDR(n)	IMX51_UART##n##_BASE_ADDR
#define IMX51_UART_BASE(n)	IMX51_UART_BASE_ADDR(n)

#define IMX53_UART1_BASE_ADDR	0x53fbc000
#define IMX53_UART2_BASE_ADDR	0x53fc0000
#define IMX53_UART3_BASE_ADDR	0x5000c000
#define IMX53_UART4_BASE_ADDR	0x53ff0000
#define IMX53_UART5_BASE_ADDR	0x63f90000
#define IMX53_UART_BASE_ADDR(n)	IMX53_UART##n##_BASE_ADDR
#define IMX53_UART_BASE(n)	IMX53_UART_BASE_ADDR(n)

#define IMX6Q_UART1_BASE_ADDR	0x02020000
#define IMX6Q_UART2_BASE_ADDR	0x021e8000
#define IMX6Q_UART3_BASE_ADDR	0x021ec000
#define IMX6Q_UART4_BASE_ADDR	0x021f0000
#define IMX6Q_UART5_BASE_ADDR	0x021f4000
#define IMX6Q_UART_BASE_ADDR(n)	IMX6Q_UART##n##_BASE_ADDR
#define IMX6Q_UART_BASE(n)	IMX6Q_UART_BASE_ADDR(n)

#define IMX6SL_UART1_BASE_ADDR	0x02020000
#define IMX6SL_UART2_BASE_ADDR	0x02024000
#define IMX6SL_UART3_BASE_ADDR	0x02034000
#define IMX6SL_UART4_BASE_ADDR	0x02038000
#define IMX6SL_UART5_BASE_ADDR	0x02018000
#define IMX6SL_UART_BASE_ADDR(n) IMX6SL_UART##n##_BASE_ADDR
#define IMX6SL_UART_BASE(n)	IMX6SL_UART_BASE_ADDR(n)

#define IMX6SX_UART1_BASE_ADDR	0x02020000
#define IMX6SX_UART2_BASE_ADDR	0x021e8000
#define IMX6SX_UART3_BASE_ADDR	0x021ec000
#define IMX6SX_UART4_BASE_ADDR	0x021f0000
#define IMX6SX_UART5_BASE_ADDR	0x021f4000
#define IMX6SX_UART6_BASE_ADDR	0x022a0000
#define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR
#define IMX6SX_UART_BASE(n)	IMX6SX_UART_BASE_ADDR(n)

#define IMX6UL_UART1_BASE_ADDR	0x02020000
#define IMX6UL_UART2_BASE_ADDR	0x021e8000
#define IMX6UL_UART3_BASE_ADDR	0x021ec000
#define IMX6UL_UART4_BASE_ADDR	0x021f0000
#define IMX6UL_UART5_BASE_ADDR	0x021f4000
#define IMX6UL_UART6_BASE_ADDR	0x021fc000
#define IMX6UL_UART7_BASE_ADDR	0x02018000
#define IMX6UL_UART8_BASE_ADDR	0x02024000
#define IMX6UL_UART_BASE_ADDR(n) IMX6UL_UART##n##_BASE_ADDR
#define IMX6UL_UART_BASE(n)	IMX6UL_UART_BASE_ADDR(n)

#define IMX7D_UART1_BASE_ADDR	0x30860000
#define IMX7D_UART2_BASE_ADDR	0x30890000
#define IMX7D_UART3_BASE_ADDR	0x30880000
#define IMX7D_UART4_BASE_ADDR	0x30a60000
#define IMX7D_UART5_BASE_ADDR	0x30a70000
#define IMX7D_UART6_BASE_ADDR	0x30a80000
#define IMX7D_UART7_BASE_ADDR	0x30a90000
#define IMX7D_UART_BASE_ADDR(n) IMX7D_UART##n##_BASE_ADDR
#define IMX7D_UART_BASE(n)	IMX7D_UART_BASE_ADDR(n)

#define IMX_DEBUG_UART_BASE(soc) soc##_UART_BASE(CONFIG_DEBUG_IMX_UART_PORT)

#ifdef CONFIG_DEBUG_IMX1_UART
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX1)
#elif defined(CONFIG_DEBUG_IMX21_IMX27_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX21)
#elif defined(CONFIG_DEBUG_IMX25_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX25)
#elif defined(CONFIG_DEBUG_IMX31_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX31)
#elif defined(CONFIG_DEBUG_IMX35_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX35)
#elif defined(CONFIG_DEBUG_IMX50_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX50)
#elif defined(CONFIG_DEBUG_IMX51_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX51)
#elif defined(CONFIG_DEBUG_IMX53_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX53)
#elif defined(CONFIG_DEBUG_IMX6Q_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6Q)
#elif defined(CONFIG_DEBUG_IMX6SL_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SL)
#elif defined(CONFIG_DEBUG_IMX6SX_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SX)
#elif defined(CONFIG_DEBUG_IMX6UL_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6UL)
#elif defined(CONFIG_DEBUG_IMX7D_UART)
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX7D)

#endif

#endif /* __DEBUG_IMX_UART_H */