OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	320 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 a.out-core.h	2.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 a.out.h	574 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp.h	457 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp_backend.h	948 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	405 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	9.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	2.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	8.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	571 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	294 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	507 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	1.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compiler.h	498 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 console.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_apecs.h	16.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_cia.h	15.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_irongate.h	6.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_lca.h	11.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_marvel.h	9.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_mcpcia.h	11.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_polaris.h	2.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_t2.h	19.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_titan.h	11.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_tsunami.h	8.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_wildfire.h	8.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	264 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	129 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	276 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	12.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	5.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 emergency-restart.h	149 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 err_common.h	3.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 err_ev6.h	116 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 err_ev7.h	4.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	1.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	12 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	1.97 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 gct.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	302 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwrpb.h	6.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	15.03 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 io_trivial.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	2.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 irq_regs.h	34 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jensen.h	8.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	32 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	265 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	256 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	2.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 local64.h	33 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec.h	3.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc.h	680 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mce.h	4.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	203 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	7.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	2.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	329 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pal.h	5.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 param.h	284 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	536 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	2.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	527 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	105 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	1.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	13.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	2.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	754 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 rwsem.h	4.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	132 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfp-machine.h	2.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	191 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	627 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 socket.h	310 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 special_insns.h	925 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	2.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	413 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	406 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	235 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 termios.h	2.98 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 thread_info.h	3.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	827 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	473 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	3.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	957 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	143 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	9.56 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ucontext.h	348 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	340 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	494 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	2.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 word-at-a-time.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 wrperfmon.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xchg.h	5.74 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 xor.h	21.71 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: bitops.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ALPHA_BITOPS_H
#define _ALPHA_BITOPS_H

#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif

#include <asm/compiler.h>
#include <asm/barrier.h>

/*
 * Copyright 1994, Linus Torvalds.
 */

/*
 * These have to be done with inline assembly: that way the bit-setting
 * is guaranteed to be atomic. All bit operations return 0 if the bit
 * was cleared before the operation and != 0 if it was not.
 *
 * To get proper branch prediction for the main line, we must branch
 * forward to code at the end of this object's .text section, then
 * branch back to restart the operation.
 *
 * bit 0 is the LSB of addr; bit 64 is the LSB of (addr+1).
 */

static inline void
set_bit(unsigned long nr, volatile void * addr)
{
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
	"1:	ldl_l %0,%3\n"
	"	bis %0,%2,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,2f\n"
	".subsection 2\n"
	"2:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m)
	:"Ir" (1UL << (nr & 31)), "m" (*m));
}

/*
 * WARNING: non atomic version.
 */
static inline void
__set_bit(unsigned long nr, volatile void * addr)
{
	int *m = ((int *) addr) + (nr >> 5);

*m |= 1 << (nr & 31);
}

static inline void
clear_bit(unsigned long nr, volatile void * addr)
{
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
	"1:	ldl_l %0,%3\n"
	"	bic %0,%2,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,2f\n"
	".subsection 2\n"
	"2:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m)
	:"Ir" (1UL << (nr & 31)), "m" (*m));
}

static inline void
clear_bit_unlock(unsigned long nr, volatile void * addr)
{
	smp_mb();
	clear_bit(nr, addr);
}

/*
 * WARNING: non atomic version.
 */
static __inline__ void
__clear_bit(unsigned long nr, volatile void * addr)
{
	int *m = ((int *) addr) + (nr >> 5);

*m &= ~(1 << (nr & 31));
}

static inline void
__clear_bit_unlock(unsigned long nr, volatile void * addr)
{
	smp_mb();
	__clear_bit(nr, addr);
}

static inline void
change_bit(unsigned long nr, volatile void * addr)
{
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
	"1:	ldl_l %0,%3\n"
	"	xor %0,%2,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,2f\n"
	".subsection 2\n"
	"2:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m)
	:"Ir" (1UL << (nr & 31)), "m" (*m));
}

/*
 * WARNING: non atomic version.
 */
static __inline__ void
__change_bit(unsigned long nr, volatile void * addr)
{
	int *m = ((int *) addr) + (nr >> 5);

*m ^= 1 << (nr & 31);
}

static inline int
test_and_set_bit(unsigned long nr, volatile void *addr)
{
	unsigned long oldbit;
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	"1:	ldl_l %0,%4\n"
	"	and %0,%3,%2\n"
	"	bne %2,2f\n"
	"	xor %0,%3,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,3f\n"
	"2:\n"
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	".subsection 2\n"
	"3:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m), "=&r" (oldbit)
	:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");

return oldbit != 0;
}

static inline int
test_and_set_bit_lock(unsigned long nr, volatile void *addr)
{
	unsigned long oldbit;
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
	"1:	ldl_l %0,%4\n"
	"	and %0,%3,%2\n"
	"	bne %2,2f\n"
	"	xor %0,%3,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,3f\n"
	"2:\n"
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	".subsection 2\n"
	"3:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m), "=&r" (oldbit)
	:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");

return oldbit != 0;
}

/*
 * WARNING: non atomic version.
 */
static inline int
__test_and_set_bit(unsigned long nr, volatile void * addr)
{
	unsigned long mask = 1 << (nr & 0x1f);
	int *m = ((int *) addr) + (nr >> 5);
	int old = *m;

*m = old | mask;
	return (old & mask) != 0;
}

static inline int
test_and_clear_bit(unsigned long nr, volatile void * addr)
{
	unsigned long oldbit;
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	"1:	ldl_l %0,%4\n"
	"	and %0,%3,%2\n"
	"	beq %2,2f\n"
	"	xor %0,%3,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,3f\n"
	"2:\n"
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	".subsection 2\n"
	"3:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m), "=&r" (oldbit)
	:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");

return oldbit != 0;
}

/*
 * WARNING: non atomic version.
 */
static inline int
__test_and_clear_bit(unsigned long nr, volatile void * addr)
{
	unsigned long mask = 1 << (nr & 0x1f);
	int *m = ((int *) addr) + (nr >> 5);
	int old = *m;

*m = old & ~mask;
	return (old & mask) != 0;
}

static inline int
test_and_change_bit(unsigned long nr, volatile void * addr)
{
	unsigned long oldbit;
	unsigned long temp;
	int *m = ((int *) addr) + (nr >> 5);

__asm__ __volatile__(
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	"1:	ldl_l %0,%4\n"
	"	and %0,%3,%2\n"
	"	xor %0,%3,%0\n"
	"	stl_c %0,%1\n"
	"	beq %0,3f\n"
#ifdef CONFIG_SMP
	"	mb\n"
#endif
	".subsection 2\n"
	"3:	br 1b\n"
	".previous"
	:"=&r" (temp), "=m" (*m), "=&r" (oldbit)
	:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");

return oldbit != 0;
}

/*
 * WARNING: non atomic version.
 */
static __inline__ int
__test_and_change_bit(unsigned long nr, volatile void * addr)
{
	unsigned long mask = 1 << (nr & 0x1f);
	int *m = ((int *) addr) + (nr >> 5);
	int old = *m;

*m = old ^ mask;
	return (old & mask) != 0;
}

static inline int
test_bit(int nr, const volatile void * addr)
{
	return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL;
}

/*
 * ffz = Find First Zero in word. Undefined if no zero exists,
 * so code should check against ~0UL first..
 *
 * Do a binary search on the bits.  Due to the nature of large
 * constants on the alpha, it is worthwhile to split the search.
 */
static inline unsigned long ffz_b(unsigned long x)
{
	unsigned long sum, x1, x2, x4;

x = ~x & -~x;		/* set first 0 bit, clear others */
	x1 = x & 0xAA;
	x2 = x & 0xCC;
	x4 = x & 0xF0;
	sum = x2 ? 2 : 0;
	sum += (x4 != 0) * 4;
	sum += (x1 != 0);

return sum;
}

static inline unsigned long ffz(unsigned long word)
{
#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
	/* Whee.  EV67 can calculate it directly.  */
	return __kernel_cttz(~word);
#else
	unsigned long bits, qofs, bofs;

bits = __kernel_cmpbge(word, ~0UL);
	qofs = ffz_b(bits);
	bits = __kernel_extbl(word, qofs);
	bofs = ffz_b(bits);

return qofs*8 + bofs;
#endif
}

/*
 * __ffs = Find First set bit in word.  Undefined if no set bit exists.
 */
static inline unsigned long __ffs(unsigned long word)
{
#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
	/* Whee.  EV67 can calculate it directly.  */
	return __kernel_cttz(word);
#else
	unsigned long bits, qofs, bofs;

bits = __kernel_cmpbge(0, word);
	qofs = ffz_b(bits);
	bits = __kernel_extbl(word, qofs);
	bofs = ffz_b(~bits);

return qofs*8 + bofs;
#endif
}

#ifdef __KERNEL__

/*
 * ffs: find first bit set. This is defined the same way as
 * the libc and compiler builtin ffs routines, therefore
 * differs in spirit from the above __ffs.
 */

static inline int ffs(int word)
{
	int result = __ffs(word) + 1;
	return word ? result : 0;
}

/*
 * fls: find last bit set.
 */
#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
static inline int fls64(unsigned long word)
{
	return 64 - __kernel_ctlz(word);
}
#else
extern const unsigned char __flsm1_tab[256];

static inline int fls64(unsigned long x)
{
	unsigned long t, a, r;

t = __kernel_cmpbge (x, 0x0101010101010101UL);
	a = __flsm1_tab[t];
	t = __kernel_extbl (x, a);
	r = a*8 + __flsm1_tab[t] + (x != 0);

return r;
}
#endif

static inline unsigned long __fls(unsigned long x)
{
	return fls64(x) - 1;
}

static inline int fls(int x)
{
	return fls64((unsigned int) x);
}

/*
 * hweightN: returns the hamming weight (i.e. the number
 * of bits set) of a N-bit word
 */

#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
/* Whee.  EV67 can calculate it directly.  */
static inline unsigned long __arch_hweight64(unsigned long w)
{
	return __kernel_ctpop(w);
}

static inline unsigned int __arch_hweight32(unsigned int w)
{
	return __arch_hweight64(w);
}

static inline unsigned int __arch_hweight16(unsigned int w)
{
	return __arch_hweight64(w & 0xffff);
}

static inline unsigned int __arch_hweight8(unsigned int w)
{
	return __arch_hweight64(w & 0xff);
}
#else
#include <asm-generic/bitops/arch_hweight.h>
#endif

#include <asm-generic/bitops/const_hweight.h>

#endif /* __KERNEL__ */

#include <asm-generic/bitops/find.h>

#ifdef __KERNEL__

/*
 * Every architecture must define this function. It's the fastest
 * way of searching a 100-bit bitmap.  It's guaranteed that at least
 * one of the 100 bits is cleared.
 */
static inline unsigned long
sched_find_first_bit(const unsigned long b[2])
{
	unsigned long b0, b1, ofs, tmp;

b0 = b[0];
	b1 = b[1];
	ofs = (b0 ? 0 : 64);
	tmp = (b0 ? b0 : b1);

return __ffs(tmp) + ofs;
}

#include <asm-generic/bitops/le.h>

#include <asm-generic/bitops/ext2-atomic-setbit.h>

#endif /* __KERNEL__ */

#endif /* _ALPHA_BITOPS_H */