OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	320 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 a.out-core.h	2.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 a.out.h	574 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp.h	457 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp_backend.h	948 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-prototypes.h	405 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	9.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	2.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	8.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	571 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	294 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	507 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	1.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compiler.h	498 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 console.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_apecs.h	16.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_cia.h	15.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_irongate.h	6.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_lca.h	11.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_marvel.h	9.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_mcpcia.h	11.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_polaris.h	2.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_t2.h	19.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_titan.h	11.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_tsunami.h	8.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core_wildfire.h	8.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	264 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 device.h	129 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	276 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	12.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	5.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 emergency-restart.h	149 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 err_common.h	3.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 err_ev6.h	116 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 err_ev7.h	4.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 extable.h	1.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	12 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	1.97 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 gct.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	223 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	302 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 hwrpb.h	6.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	15.03 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 io_trivial.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	2.31 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 irq_regs.h	34 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 jensen.h	8.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	32 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	265 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	256 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	2.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 local64.h	33 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machvec.h	3.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc146818rtc.h	680 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mce.h	4.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	203 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	7.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	2.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	329 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pal.h	5.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 param.h	284 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	536 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	2.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	527 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	105 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	1.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	13.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	2.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	754 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 rwsem.h	4.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	132 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sfp-machine.h	2.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	191 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	627 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 socket.h	310 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 special_insns.h	925 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	2.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	413 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	406 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	235 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 termios.h	2.98 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 thread_info.h	3.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	827 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	473 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	3.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	957 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	143 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	9.56 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 ucontext.h	348 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	340 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	494 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	2.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 word-at-a-time.h	1.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 wrperfmon.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xchg.h	5.74 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 xor.h	21.71 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: atomic.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ALPHA_ATOMIC_H
#define _ALPHA_ATOMIC_H

#include <linux/types.h>
#include <asm/barrier.h>
#include <asm/cmpxchg.h>

/*
 * Atomic operations that C can't guarantee us.  Useful for
 * resource counting etc...
 *
 * But use these as seldom as possible since they are much slower
 * than regular operations.
 */

/*
 * To ensure dependency ordering is preserved for the _relaxed and
 * _release atomics, an smp_read_barrier_depends() is unconditionally
 * inserted into the _relaxed variants, which are used to build the
 * barriered versions. To avoid redundant back-to-back fences, we can
 * define the _acquire and _fence versions explicitly.
 */
#define __atomic_op_acquire(op, args...)	op##_relaxed(args)
#define __atomic_op_fence			__atomic_op_release

#define ATOMIC_INIT(i)		{ (i) }
#define ATOMIC64_INIT(i)	{ (i) }

#define atomic_read(v)		READ_ONCE((v)->counter)
#define atomic64_read(v)	READ_ONCE((v)->counter)

#define atomic_set(v,i)		WRITE_ONCE((v)->counter, (i))
#define atomic64_set(v,i)	WRITE_ONCE((v)->counter, (i))

/*
 * To get proper branch prediction for the main line, we must branch
 * forward to code at the end of this object's .text section, then
 * branch back to restart the operation.
 */

#define ATOMIC_OP(op, asm_op)						\
static __inline__ void atomic_##op(int i, atomic_t * v)			\
{									\
	unsigned long temp;						\
	__asm__ __volatile__(						\
	"1:	ldl_l %0,%1\n"						\
	"	" #asm_op " %0,%2,%0\n"					\
	"	stl_c %0,%1\n"						\
	"	beq %0,2f\n"						\
	".subsection 2\n"						\
	"2:	br 1b\n"						\
	".previous"							\
	:"=&r" (temp), "=m" (v->counter)				\
	:"Ir" (i), "m" (v->counter));					\
}									\

#define ATOMIC_OP_RETURN(op, asm_op)					\
static inline int atomic_##op##_return_relaxed(int i, atomic_t *v)	\
{									\
	long temp, result;						\
	__asm__ __volatile__(						\
	"1:	ldl_l %0,%1\n"						\
	"	" #asm_op " %0,%3,%2\n"					\
	"	" #asm_op " %0,%3,%0\n"					\
	"	stl_c %0,%1\n"						\
	"	beq %0,2f\n"						\
	".subsection 2\n"						\
	"2:	br 1b\n"						\
	".previous"							\
	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
	:"Ir" (i), "m" (v->counter) : "memory");			\
	smp_read_barrier_depends();					\
	return result;							\
}

#define ATOMIC_FETCH_OP(op, asm_op)					\
static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v)	\
{									\
	long temp, result;						\
	__asm__ __volatile__(						\
	"1:	ldl_l %2,%1\n"						\
	"	" #asm_op " %2,%3,%0\n"					\
	"	stl_c %0,%1\n"						\
	"	beq %0,2f\n"						\
	".subsection 2\n"						\
	"2:	br 1b\n"						\
	".previous"							\
	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
	:"Ir" (i), "m" (v->counter) : "memory");			\
	smp_read_barrier_depends();					\
	return result;							\
}

#define ATOMIC64_OP(op, asm_op)						\
static __inline__ void atomic64_##op(long i, atomic64_t * v)		\
{									\
	unsigned long temp;						\
	__asm__ __volatile__(						\
	"1:	ldq_l %0,%1\n"						\
	"	" #asm_op " %0,%2,%0\n"					\
	"	stq_c %0,%1\n"						\
	"	beq %0,2f\n"						\
	".subsection 2\n"						\
	"2:	br 1b\n"						\
	".previous"							\
	:"=&r" (temp), "=m" (v->counter)				\
	:"Ir" (i), "m" (v->counter));					\
}									\

#define ATOMIC64_OP_RETURN(op, asm_op)					\
static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v)	\
{									\
	long temp, result;						\
	__asm__ __volatile__(						\
	"1:	ldq_l %0,%1\n"						\
	"	" #asm_op " %0,%3,%2\n"					\
	"	" #asm_op " %0,%3,%0\n"					\
	"	stq_c %0,%1\n"						\
	"	beq %0,2f\n"						\
	".subsection 2\n"						\
	"2:	br 1b\n"						\
	".previous"							\
	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
	:"Ir" (i), "m" (v->counter) : "memory");			\
	smp_read_barrier_depends();					\
	return result;							\
}

#define ATOMIC64_FETCH_OP(op, asm_op)					\
static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v)	\
{									\
	long temp, result;						\
	__asm__ __volatile__(						\
	"1:	ldq_l %2,%1\n"						\
	"	" #asm_op " %2,%3,%0\n"					\
	"	stq_c %0,%1\n"						\
	"	beq %0,2f\n"						\
	".subsection 2\n"						\
	"2:	br 1b\n"						\
	".previous"							\
	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
	:"Ir" (i), "m" (v->counter) : "memory");			\
	smp_read_barrier_depends();					\
	return result;							\
}

#define ATOMIC_OPS(op)							\
	ATOMIC_OP(op, op##l)						\
	ATOMIC_OP_RETURN(op, op##l)					\
	ATOMIC_FETCH_OP(op, op##l)					\
	ATOMIC64_OP(op, op##q)						\
	ATOMIC64_OP_RETURN(op, op##q)					\
	ATOMIC64_FETCH_OP(op, op##q)

ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define atomic_add_return_relaxed	atomic_add_return_relaxed
#define atomic_sub_return_relaxed	atomic_sub_return_relaxed
#define atomic_fetch_add_relaxed	atomic_fetch_add_relaxed
#define atomic_fetch_sub_relaxed	atomic_fetch_sub_relaxed

#define atomic64_add_return_relaxed	atomic64_add_return_relaxed
#define atomic64_sub_return_relaxed	atomic64_sub_return_relaxed
#define atomic64_fetch_add_relaxed	atomic64_fetch_add_relaxed
#define atomic64_fetch_sub_relaxed	atomic64_fetch_sub_relaxed

#define atomic_andnot atomic_andnot
#define atomic64_andnot atomic64_andnot

#undef ATOMIC_OPS
#define ATOMIC_OPS(op, asm)						\
	ATOMIC_OP(op, asm)						\
	ATOMIC_FETCH_OP(op, asm)					\
	ATOMIC64_OP(op, asm)						\
	ATOMIC64_FETCH_OP(op, asm)

ATOMIC_OPS(and, and)
ATOMIC_OPS(andnot, bic)
ATOMIC_OPS(or, bis)
ATOMIC_OPS(xor, xor)

#define atomic_fetch_and_relaxed	atomic_fetch_and_relaxed
#define atomic_fetch_andnot_relaxed	atomic_fetch_andnot_relaxed
#define atomic_fetch_or_relaxed		atomic_fetch_or_relaxed
#define atomic_fetch_xor_relaxed	atomic_fetch_xor_relaxed

#define atomic64_fetch_and_relaxed	atomic64_fetch_and_relaxed
#define atomic64_fetch_andnot_relaxed	atomic64_fetch_andnot_relaxed
#define atomic64_fetch_or_relaxed	atomic64_fetch_or_relaxed
#define atomic64_fetch_xor_relaxed	atomic64_fetch_xor_relaxed

#undef ATOMIC_OPS
#undef ATOMIC64_FETCH_OP
#undef ATOMIC64_OP_RETURN
#undef ATOMIC64_OP
#undef ATOMIC_FETCH_OP
#undef ATOMIC_OP_RETURN
#undef ATOMIC_OP

#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))

#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

/**
 * __atomic_add_unless - add unless the number is a given value
 * @v: pointer of type atomic_t
 * @a: the amount to add to v...
 * @u: ...unless v is equal to u.
 *
 * Atomically adds @a to @v, so long as it was not @u.
 * Returns the old value of @v.
 */
static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
{
	int c, new, old;
	smp_mb();
	__asm__ __volatile__(
	"1:	ldl_l	%[old],%[mem]\n"
	"	cmpeq	%[old],%[u],%[c]\n"
	"	addl	%[old],%[a],%[new]\n"
	"	bne	%[c],2f\n"
	"	stl_c	%[new],%[mem]\n"
	"	beq	%[new],3f\n"
	"2:\n"
	".subsection 2\n"
	"3:	br	1b\n"
	".previous"
	: [old] "=&r"(old), [new] "=&r"(new), [c] "=&r"(c)
	: [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u)
	: "memory");
	smp_mb();
	return old;
}

/**
 * atomic64_add_unless - add unless the number is a given value
 * @v: pointer of type atomic64_t
 * @a: the amount to add to v...
 * @u: ...unless v is equal to u.
 *
 * Atomically adds @a to @v, so long as it was not @u.
 * Returns true iff @v was not @u.
 */
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
{
	long c, tmp;
	smp_mb();
	__asm__ __volatile__(
	"1:	ldq_l	%[tmp],%[mem]\n"
	"	cmpeq	%[tmp],%[u],%[c]\n"
	"	addq	%[tmp],%[a],%[tmp]\n"
	"	bne	%[c],2f\n"
	"	stq_c	%[tmp],%[mem]\n"
	"	beq	%[tmp],3f\n"
	"2:\n"
	".subsection 2\n"
	"3:	br	1b\n"
	".previous"
	: [tmp] "=&r"(tmp), [c] "=&r"(c)
	: [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u)
	: "memory");
	smp_mb();
	return !c;
}

/*
 * atomic64_dec_if_positive - decrement by 1 if old value positive
 * @v: pointer of type atomic_t
 *
 * The function returns the old value of *v minus 1, even if
 * the atomic variable, v, was not decremented.
 */
static inline long atomic64_dec_if_positive(atomic64_t *v)
{
	long old, tmp;
	smp_mb();
	__asm__ __volatile__(
	"1:	ldq_l	%[old],%[mem]\n"
	"	subq	%[old],1,%[tmp]\n"
	"	ble	%[old],2f\n"
	"	stq_c	%[tmp],%[mem]\n"
	"	beq	%[tmp],3f\n"
	"2:\n"
	".subsection 2\n"
	"3:	br	1b\n"
	".previous"
	: [old] "=&r"(old), [tmp] "=&r"(tmp)
	: [mem] "m"(*v)
	: "memory");
	smp_mb();
	return old - 1;
}

#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)

#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)

#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic64_dec_return(v) atomic64_sub_return(1,(v))

#define atomic_inc_return(v) atomic_add_return(1,(v))
#define atomic64_inc_return(v) atomic64_add_return(1,(v))

#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0)

#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
#define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0)

#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)

#define atomic_inc(v) atomic_add(1,(v))
#define atomic64_inc(v) atomic64_add(1,(v))

#define atomic_dec(v) atomic_sub(1,(v))
#define atomic64_dec(v) atomic64_sub(1,(v))

#endif /* _ALPHA_ATOMIC_H */