OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:13 AM	rwxr-xr-x
📄 Kbuild	610 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp.h	596 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmregs.h	3.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 assembly.h	12.94 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 atomic.h	8.24 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 barrier.h	2.44 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bitops.h	5.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	2.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	340 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	1.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	4.06 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 checksum.h	5.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	3.62 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 compat.h	6.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compat_ucontext.h	591 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	533 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	5.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dwarf.h	602 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 eisa_bus.h	702 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 eisa_eeprom.h	4.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	14.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	403 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	1.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	6.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	379 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 grfioctl.h	4.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardware.h	4.1 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 hash.h	5.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	8.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kbdleds.h	477 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	221 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ldcw.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 led.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	759 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machdep.h	349 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mckinley.h	270 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	195 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	527 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	5.42 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 parisc-device.h	1.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	358 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	6.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pdc.h	3.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pdc_chassis.h	15.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pdcpat.h	15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf.h	1.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	152 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	4.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	18.92 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 prefetch.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	9.86 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 psw.h	2.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	803 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 ropes.h	9.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rt_sigframe.h	745 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 runway.h	320 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	283 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	124 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	263 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	841 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	1.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 socket.h	311 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 special_insns.h	1015 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	4.02 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 spinlock_types.h	483 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	247 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 superio.h	3.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	332 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 termios.h	1.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	372 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlb.h	672 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	2.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	900 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	468 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	6.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucontext.h	327 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	472 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	5.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: io.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_IO_H
#define _ASM_IO_H

#include <linux/types.h>
#include <asm/pgtable.h>

#define virt_to_phys(a) ((unsigned long)__pa(a))
#define phys_to_virt(a) __va(a)
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

static inline unsigned long isa_bus_to_virt(unsigned long addr) {
	BUG();
	return 0;
}

static inline unsigned long isa_virt_to_bus(void *addr) {
	BUG();
	return 0;
}

/*
 * Memory mapped I/O
 *
 * readX()/writeX() do byteswapping and take an ioremapped address
 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
 * gsc_*() don't byteswap and operate on physical addresses;
 *   eg dev->hpa or 0xfee00000.
 */

static inline unsigned char gsc_readb(unsigned long addr)
{
	long flags;
	unsigned char ret;

__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	ldbx	0(%2),%1\n"
	"	mtsm	%0\n"
	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );

return ret;
}

static inline unsigned short gsc_readw(unsigned long addr)
{
	long flags;
	unsigned short ret;

__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	ldhx	0(%2),%1\n"
	"	mtsm	%0\n"
	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );

return ret;
}

static inline unsigned int gsc_readl(unsigned long addr)
{
	u32 ret;

__asm__ __volatile__(
	"	ldwax	0(%1),%0\n"
	: "=r" (ret) : "r" (addr) );

return ret;
}

static inline unsigned long long gsc_readq(unsigned long addr)
{
	unsigned long long ret;

#ifdef CONFIG_64BIT
	__asm__ __volatile__(
	"	ldda	0(%1),%0\n"
	:  "=r" (ret) : "r" (addr) );
#else
	/* two reads may have side effects.. */
	ret = ((u64) gsc_readl(addr)) << 32;
	ret |= gsc_readl(addr+4);
#endif
	return ret;
}

static inline void gsc_writeb(unsigned char val, unsigned long addr)
{
	long flags;
	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	stbs	%1,0(%2)\n"
	"	mtsm	%0\n"
	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
}

static inline void gsc_writew(unsigned short val, unsigned long addr)
{
	long flags;
	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	sths	%1,0(%2)\n"
	"	mtsm	%0\n"
	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
}

static inline void gsc_writel(unsigned int val, unsigned long addr)
{
	__asm__ __volatile__(
	"	stwas	%0,0(%1)\n"
	: :  "r" (val), "r" (addr) );
}

static inline void gsc_writeq(unsigned long long val, unsigned long addr)
{
#ifdef CONFIG_64BIT
	__asm__ __volatile__(
	"	stda	%0,0(%1)\n"
	: :  "r" (val), "r" (addr) );
#else
	/* two writes may have side effects.. */
	gsc_writel(val >> 32, addr);
	gsc_writel(val, addr+4);
#endif
}

/*
 * The standard PCI ioremap interfaces
 */

extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);

/* Most machines react poorly to I/O-space being cacheable... Instead let's
 * define ioremap() in terms of ioremap_nocache().
 */
static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
{
	return __ioremap(offset, size, _PAGE_NO_CACHE);
}
#define ioremap_nocache(off, sz)	ioremap((off), (sz))
#define ioremap_wc			ioremap_nocache
#define ioremap_uc			ioremap_nocache

extern void iounmap(const volatile void __iomem *addr);

static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
	return (*(volatile unsigned char __force *) (addr));
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *) addr;
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *) addr;
}
static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
{
	return *(volatile unsigned long long __force *) addr;
}

static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *) addr = b;
}
static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *) addr = b;
}
static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *) addr = b;
}
static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
{
	*(volatile unsigned long long __force *) addr = b;
}

static inline unsigned char readb(const volatile void __iomem *addr)
{
	return __raw_readb(addr);
}
static inline unsigned short readw(const volatile void __iomem *addr)
{
	return le16_to_cpu(__raw_readw(addr));
}
static inline unsigned int readl(const volatile void __iomem *addr)
{
	return le32_to_cpu(__raw_readl(addr));
}
static inline unsigned long long readq(const volatile void __iomem *addr)
{
	return le64_to_cpu(__raw_readq(addr));
}

static inline void writeb(unsigned char b, volatile void __iomem *addr)
{
	__raw_writeb(b, addr);
}
static inline void writew(unsigned short w, volatile void __iomem *addr)
{
	__raw_writew(cpu_to_le16(w), addr);
}
static inline void writel(unsigned int l, volatile void __iomem *addr)
{
	__raw_writel(cpu_to_le32(l), addr);
}
static inline void writeq(unsigned long long q, volatile void __iomem *addr)
{
	__raw_writeq(cpu_to_le64(q), addr);
}

#define	readb	readb
#define	readw	readw
#define	readl	readl
#define readq	readq
#define writeb	writeb
#define writew	writew
#define writel	writel
#define writeq	writeq

#define readb_relaxed(addr)	readb(addr)
#define readw_relaxed(addr)	readw(addr)
#define readl_relaxed(addr)	readl(addr)
#define readq_relaxed(addr)	readq(addr)
#define writeb_relaxed(b, addr)	writeb(b, addr)
#define writew_relaxed(w, addr)	writew(w, addr)
#define writel_relaxed(l, addr)	writel(l, addr)
#define writeq_relaxed(q, addr)	writeq(q, addr)

#define mmiowb() do { } while (0)

void memset_io(volatile void __iomem *addr, unsigned char val, int count);
void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
void memcpy_toio(volatile void __iomem *dst, const void *src, int count);

/* Port-space IO */

#define inb_p inb
#define inw_p inw
#define inl_p inl
#define outb_p outb
#define outw_p outw
#define outl_p outl

extern unsigned char eisa_in8(unsigned short port);
extern unsigned short eisa_in16(unsigned short port);
extern unsigned int eisa_in32(unsigned short port);
extern void eisa_out8(unsigned char data, unsigned short port);
extern void eisa_out16(unsigned short data, unsigned short port);
extern void eisa_out32(unsigned int data, unsigned short port);

#if defined(CONFIG_PCI)
extern unsigned char inb(int addr);
extern unsigned short inw(int addr);
extern unsigned int inl(int addr);

extern void outb(unsigned char b, int addr);
extern void outw(unsigned short b, int addr);
extern void outl(unsigned int b, int addr);
#elif defined(CONFIG_EISA)
#define inb eisa_in8
#define inw eisa_in16
#define inl eisa_in32
#define outb eisa_out8
#define outw eisa_out16
#define outl eisa_out32
#else
static inline char inb(unsigned long addr)
{
	BUG();
	return -1;
}

static inline short inw(unsigned long addr)
{
	BUG();
	return -1;
}

static inline int inl(unsigned long addr)
{
	BUG();
	return -1;
}

#define outb(x, y)	BUG()
#define outw(x, y)	BUG()
#define outl(x, y)	BUG()
#endif

/*
 * String versions of in/out ops:
 */
extern void insb (unsigned long port, void *dst, unsigned long count);
extern void insw (unsigned long port, void *dst, unsigned long count);
extern void insl (unsigned long port, void *dst, unsigned long count);
extern void outsb (unsigned long port, const void *src, unsigned long count);
extern void outsw (unsigned long port, const void *src, unsigned long count);
extern void outsl (unsigned long port, const void *src, unsigned long count);

/* IO Port space is :      BBiiii   where BB is HBA number. */
#define IO_SPACE_LIMIT 0x00ffffff

/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
 * mode (essentially just sign extending.  This macro takes in a 32
 * bit I/O address (still with the leading f) and outputs the correct
 * value for either 32 or 64 bit mode */
#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))

#include <asm-generic/iomap.h>

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

#endif