OXIESEC PANEL
- Current Dir:
/
/
usr
/
src
/
linux-headers-4.15.0-213
/
arch
/
blackfin
/
include
/
asm
Server IP: 139.59.38.164
Upload:
Create Dir:
Name
Size
Modified
Perms
📁
..
-
05/09/2024 07:14:12 AM
rwxr-xr-x
📄
Kbuild
658 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
asm-offsets.h
35 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
atomic.h
1.55 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
barrier.h
2.55 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin-global.h
2.8 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin-lq035q1.h
868 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin5xx_spi.h
2.07 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_can.h
36.04 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_dma.h
5.46 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_pfmon.h
1.11 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_ppi.h
9.01 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_sdh.h
7.2 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_serial.h
17.02 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_simple_timer.h
949 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_sport.h
1.21 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_sport3.h
5.47 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_twi.h
6.25 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfin_watchdog.h
696 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
bfrom.h
3.36 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bitops.h
3.45 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
blackfin.h
1.55 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
bug.h
1.49 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cache.h
1.47 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cacheflush.h
3.79 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cdef_LPBlackfin.h
18.93 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
checksum.h
899 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
clkdev.h
318 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
clocks.h
1.66 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cmpxchg.h
3.2 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
context.S
5.92 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cplb.h
4.86 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cplbinit.h
1.6 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
cpu.h
443 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
def_LPBlackfin.h
28.6 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
delay.h
917 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
dma-mapping.h
1.09 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
dma.h
9.28 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
dpmc.h
18.24 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
early_printk.h
1.09 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
elf.h
4.88 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
entry.h
5.27 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
exec.h
37 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
fixed_code.h
806 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
flat.h
1.41 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
ftrace.h
1.37 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
gpio.h
5.91 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
gptimers.h
8.95 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
hardirq.h
301 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
io.h
1.52 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
ipipe.h
5.81 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
ipipe_base.h
2.38 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
irq.h
879 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
irq_handler.h
1.93 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
irqflags.h
7.13 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
kgdb.h
3.23 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
l1layout.h
879 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
linkage.h
205 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
mem_init.h
13.1 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
mem_map.h
1.73 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
mmu.h
713 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
mmu_context.h
5.35 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
module.h
410 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
nand.h
895 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
nmi.h
195 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
page.h
546 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
page_offset.h
192 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
pci.h
310 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
pda.h
1.86 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
perf_event.h
23 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
pgtable.h
3 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
pm.h
590 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
portmux.h
16.38 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
processor.h
3.21 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
pseudo_instructions.h
391 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
ptrace.h
1.19 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
reboot.h
446 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
rwlock.h
142 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
scb.h
445 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
sections.h
2 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
segment.h
226 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
smp.h
1.34 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
spinlock.h
1.87 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
spinlock_types.h
495 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
string.h
1.04 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
switch_to.h
997 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
syscall.h
2.15 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
thread_info.h
2.66 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
time.h
1.33 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
timex.h
477 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
tlb.h
481 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
tlbflush.h
88 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
trace.h
2.67 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
traps.h
4.87 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
uaccess.h
5.79 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
unistd.h
523 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
vga.h
29 bytes
01/28/2018 09:20:33 PM
rw-r--r--
Editing: mmu_context.h
Close
/* * Copyright 2004-2009 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef __BLACKFIN_MMU_CONTEXT_H__ #define __BLACKFIN_MMU_CONTEXT_H__ #include <linux/slab.h> #include <linux/sched.h> #include <linux/mm_types.h> #include <asm/setup.h> #include <asm/page.h> #include <asm/pgalloc.h> #include <asm/cplbinit.h> #include <asm/sections.h> /* Note: L1 stacks are CPU-private things, so we bluntly disable this feature in SMP mode, and use the per-CPU scratch SRAM bank only to store the PDA instead. */ extern void *current_l1_stack_save; extern int nr_l1stack_tasks; extern void *l1_stack_base; extern unsigned long l1_stack_len; extern int l1sram_free(const void*); extern void *l1sram_alloc_max(void*); static inline void free_l1stack(void) { nr_l1stack_tasks--; if (nr_l1stack_tasks == 0) { l1sram_free(l1_stack_base); l1_stack_base = NULL; l1_stack_len = 0; } } static inline unsigned long alloc_l1stack(unsigned long length, unsigned long *stack_base) { if (nr_l1stack_tasks == 0) { l1_stack_base = l1sram_alloc_max(&l1_stack_len); if (!l1_stack_base) return 0; } if (l1_stack_len < length) { if (nr_l1stack_tasks == 0) l1sram_free(l1_stack_base); return 0; } *stack_base = (unsigned long)l1_stack_base; nr_l1stack_tasks++; return l1_stack_len; } static inline int activate_l1stack(struct mm_struct *mm, unsigned long sp_base) { if (current_l1_stack_save) memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len); mm->context.l1_stack_save = current_l1_stack_save = (void*)sp_base; memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len); return 1; } #define deactivate_mm(tsk,mm) do { } while (0) #define activate_mm(prev, next) switch_mm(prev, next, NULL) static inline void __switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm, struct task_struct *tsk) { #ifdef CONFIG_MPU unsigned int cpu = smp_processor_id(); #endif if (prev_mm == next_mm) return; #ifdef CONFIG_MPU if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) { flush_switched_cplbs(cpu); set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu); } #endif #ifdef CONFIG_APP_STACK_L1 /* L1 stack switching. */ if (!next_mm->context.l1_stack_save) return; if (next_mm->context.l1_stack_save == current_l1_stack_save) return; if (current_l1_stack_save) { memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len); } current_l1_stack_save = next_mm->context.l1_stack_save; memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len); #endif } #ifdef CONFIG_IPIPE #define lock_mm_switch(flags) flags = hard_local_irq_save_cond() #define unlock_mm_switch(flags) hard_local_irq_restore_cond(flags) #else #define lock_mm_switch(flags) do { (void)(flags); } while (0) #define unlock_mm_switch(flags) do { (void)(flags); } while (0) #endif /* CONFIG_IPIPE */ #ifdef CONFIG_MPU static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { unsigned long flags; lock_mm_switch(flags); __switch_mm(prev, next, tsk); unlock_mm_switch(flags); } static inline void protect_page(struct mm_struct *mm, unsigned long addr, unsigned long flags) { unsigned long *mask = mm->context.page_rwx_mask; unsigned long page; unsigned long idx; unsigned long bit; if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)) page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> 12; else page = addr >> 12; idx = page >> 5; bit = 1 << (page & 31); if (flags & VM_READ) mask[idx] |= bit; else mask[idx] &= ~bit; mask += page_mask_nelts; if (flags & VM_WRITE) mask[idx] |= bit; else mask[idx] &= ~bit; mask += page_mask_nelts; if (flags & VM_EXEC) mask[idx] |= bit; else mask[idx] &= ~bit; } static inline void update_protections(struct mm_struct *mm) { unsigned int cpu = smp_processor_id(); if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) { flush_switched_cplbs(cpu); set_mask_dcplbs(mm->context.page_rwx_mask, cpu); } } #else /* !CONFIG_MPU */ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { __switch_mm(prev, next, tsk); } #endif static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } /* Called when creating a new context during fork() or execve(). */ static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { #ifdef CONFIG_MPU unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order); mm->context.page_rwx_mask = (unsigned long *)p; memset(mm->context.page_rwx_mask, 0, page_mask_nelts * 3 * sizeof(long)); #endif return 0; } static inline void destroy_context(struct mm_struct *mm) { struct sram_list_struct *tmp; #ifdef CONFIG_MPU unsigned int cpu = smp_processor_id(); #endif #ifdef CONFIG_APP_STACK_L1 if (current_l1_stack_save == mm->context.l1_stack_save) current_l1_stack_save = 0; if (mm->context.l1_stack_save) free_l1stack(); #endif while ((tmp = mm->context.sram_list)) { mm->context.sram_list = tmp->next; sram_free(tmp->addr); kfree(tmp); } #ifdef CONFIG_MPU if (current_rwx_mask[cpu] == mm->context.page_rwx_mask) current_rwx_mask[cpu] = NULL; free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order); #endif } #define ipipe_mm_switch_protect(flags) \ flags = hard_local_irq_save_cond() #define ipipe_mm_switch_unprotect(flags) \ hard_local_irq_restore_cond(flags) #endif