OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:12 AM	rwxr-xr-x
📄 Kbuild	681 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 arcregs.h	8.59 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 asm-offsets.h	311 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	15.14 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 barrier.h	1.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	9.81 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bug.h	938 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 cache.h	3.77 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cacheflush.h	3.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	2.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	5.4 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 current.h	695 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	1.99 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 disasm.h	3.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	734 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	459 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dwarf.h	892 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	2.15 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 entry-arcv2.h	4.85 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 entry-compact.h	9.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry.h	6.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 exec.h	410 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	411 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	3.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 highmem.h	1.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugepage.h	2.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	6.43 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 irq.h	825 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags-arcv2.h	3.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags-compact.h	4.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	509 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	400 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	1.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	489 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	1.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	1.42 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mach_desc.h	2.06 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu.h	2.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	5.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	989 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	661 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.99 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pci.h	705 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	6.86 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgalloc.h	3.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	14.2 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 processor.h	4.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	3.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	407 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	612 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	644 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	442 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	4.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	8.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	1.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls.h	653 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	508 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb-mmu1.h	3.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	1.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	18.45 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unaligned.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	3.51 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: irqflags-compact.h

/*
 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __ASM_IRQFLAGS_ARCOMPACT_H
#define __ASM_IRQFLAGS_ARCOMPACT_H

/* vineetg: March 2010 : local_irq_save( ) optimisation
 *  -Remove explicit mov of current status32 into reg, that is not needed
 *  -Use BIC  insn instead of INVERTED + AND
 *  -Conditionally disable interrupts (if they are not enabled, don't disable)
*/

#include <asm/arcregs.h>

/* status32 Reg bits related to Interrupt Handling */
#define STATUS_E1_BIT		1	/* Int 1 enable */
#define STATUS_E2_BIT		2	/* Int 2 enable */
#define STATUS_A1_BIT		3	/* Int 1 active */
#define STATUS_A2_BIT		4	/* Int 2 active */
#define STATUS_AE_BIT		5	/* Exception active */

#define STATUS_E1_MASK		(1<<STATUS_E1_BIT)
#define STATUS_E2_MASK		(1<<STATUS_E2_BIT)
#define STATUS_A1_MASK		(1<<STATUS_A1_BIT)
#define STATUS_A2_MASK		(1<<STATUS_A2_BIT)
#define STATUS_AE_MASK		(1<<STATUS_AE_BIT)
#define STATUS_IE_MASK		(STATUS_E1_MASK | STATUS_E2_MASK)

/* Other Interrupt Handling related Aux regs */
#define AUX_IRQ_LEV		0x200	/* IRQ Priority: L1 or L2 */
#define AUX_IRQ_HINT		0x201	/* For generating Soft Interrupts */
#define AUX_IRQ_LV12		0x43	/* interrupt level register */

#define AUX_IENABLE		0x40c
#define AUX_ITRIGGER		0x40d
#define AUX_IPULSE		0x415

#define ISA_INIT_STATUS_BITS	STATUS_IE_MASK

#ifndef __ASSEMBLY__

/******************************************************************
 * IRQ Control Macros
 *
 * All of them have "memory" clobber (compiler barrier) which is needed to
 * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
 * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
 *
 * Noted at the time of Abilis Timer List corruption
 *	Orig Bug + Rejected solution	: https://lkml.org/lkml/2013/3/29/67
 *	Reasoning			: https://lkml.org/lkml/2013/4/8/15
 *
 ******************************************************************/

/*
 * Save IRQ state and disable IRQs
 */
static inline long arch_local_irq_save(void)
{
	unsigned long temp, flags;

__asm__ __volatile__(
	"	lr  %1, [status32]	\n"
	"	bic %0, %1, %2		\n"
	"	and.f 0, %1, %2	\n"
	"	flag.nz %0		\n"
	: "=r"(temp), "=r"(flags)
	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
	: "memory", "cc");

return flags;
}

/*
 * restore saved IRQ state
 */
static inline void arch_local_irq_restore(unsigned long flags)
{

__asm__ __volatile__(
	"	flag %0			\n"
	:
	: "r"(flags)
	: "memory");
}

/*
 * Unconditionally Enable IRQs
 */
static inline void arch_local_irq_enable(void)
{
	unsigned long temp;

__asm__ __volatile__(
	"	lr   %0, [status32]	\n"
	"	or   %0, %0, %1		\n"
	"	flag %0			\n"
	: "=&r"(temp)
	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
	: "cc", "memory");
}

/*
 * Unconditionally Disable IRQs
 */
static inline void arch_local_irq_disable(void)
{
	unsigned long temp;

__asm__ __volatile__(
	"	lr  %0, [status32]	\n"
	"	and %0, %0, %1		\n"
	"	flag %0			\n"
	: "=&r"(temp)
	: "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
	: "memory");
}

/*
 * save IRQ state
 */
static inline long arch_local_save_flags(void)
{
	unsigned long temp;

__asm__ __volatile__(
	"	lr  %0, [status32]	\n"
	: "=&r"(temp)
	:
	: "memory");

return temp;
}

/*
 * Query IRQ state
 */
static inline int arch_irqs_disabled_flags(unsigned long flags)
{
	return !(flags & (STATUS_E1_MASK
#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
			| STATUS_E2_MASK
#endif
		));
}

static inline int arch_irqs_disabled(void)
{
	return arch_irqs_disabled_flags(arch_local_save_flags());
}

#else

#ifdef CONFIG_TRACE_IRQFLAGS

.macro TRACE_ASM_IRQ_DISABLE
	bl	trace_hardirqs_off
.endm

.macro TRACE_ASM_IRQ_ENABLE
	bl	trace_hardirqs_on
.endm

#else

.macro TRACE_ASM_IRQ_DISABLE
.endm

.macro TRACE_ASM_IRQ_ENABLE
.endm

#endif

.macro IRQ_DISABLE  scratch
	lr	\scratch, [status32]
	bic	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
	flag	\scratch
	TRACE_ASM_IRQ_DISABLE
.endm

.macro IRQ_ENABLE  scratch
	TRACE_ASM_IRQ_ENABLE
	lr	\scratch, [status32]
	or	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
	flag	\scratch
.endm

#endif	/* __ASSEMBLY__ */

#endif