OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:12 AM	rwxr-xr-x
📄 Kbuild	681 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 arcregs.h	8.59 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 asm-offsets.h	311 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	15.14 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 barrier.h	1.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	9.81 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 bug.h	938 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 cache.h	3.77 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 cacheflush.h	3.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	2.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	5.4 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 current.h	695 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	1.99 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 disasm.h	3.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	734 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	459 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dwarf.h	892 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	2.15 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 entry-arcv2.h	4.85 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 entry-compact.h	9.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 entry.h	6.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 exec.h	410 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	411 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	3.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 highmem.h	1.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugepage.h	2.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	6.43 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 irq.h	825 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags-arcv2.h	3.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags-compact.h	4.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	509 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	400 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kgdb.h	1.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	489 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kprobes.h	1.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	1.42 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mach_desc.h	2.06 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mmu.h	2.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	5.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	989 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	661 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.99 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pci.h	705 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	6.86 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 pgalloc.h	3.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	14.2 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 processor.h	4.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	3.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	407 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	612 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	644 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	442 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	4.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	8.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stacktrace.h	1.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls.h	653 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	508 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb-mmu1.h	3.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	1.76 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	18.45 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unaligned.h	771 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	3.51 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: entry-arcv2.h

/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __ASM_ARC_ENTRY_ARCV2_H
#define __ASM_ARC_ENTRY_ARCV2_H

#include <asm/asm-offsets.h>
#include <asm/irqflags-arcv2.h>
#include <asm/thread_info.h>	/* For THREAD_SIZE */

/*------------------------------------------------------------------------*/
.macro INTERRUPT_PROLOGUE	called_from

; Before jumping to Interrupt Vector, hardware micro-ops did following:
	;   1. SP auto-switched to kernel mode stack
	;   2. STATUS32.Z flag set to U mode at time of interrupt (U:1, K:0)
	;   3. Auto saved: r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI, PC, STAT32
	;
	; Now manually save: r12, sp, fp, gp, r25

#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
.ifnc \called_from, exception
	st.as	r9, [sp, -10]	; save r9 in it's final stack slot
	sub	sp, sp, 12	; skip JLI, LDI, EI

PUSH	lp_count
	PUSHAX	lp_start
	PUSHAX	lp_end
	PUSH	blink

PUSH	r11
	PUSH	r10

sub	sp, sp, 4	; skip r9

PUSH	r8
	PUSH	r7
	PUSH	r6
	PUSH	r5
	PUSH	r4
	PUSH	r3
	PUSH	r2
	PUSH	r1
	PUSH	r0
.endif
#endif

#ifdef CONFIG_ARC_HAS_ACCL_REGS
	PUSH	r59
	PUSH	r58
#endif

PUSH	r30
	PUSH	r12

; Saving pt_regs->sp correctly requires some extra work due to the way
	; Auto stack switch works
	;  - U mode: retrieve it from AUX_USER_SP
	;  - K mode: add the offset from current SP where H/w starts auto push
	;
	; Utilize the fact that Z bit is set if Intr taken in U mode
	mov.nz	r9, sp
	add.nz	r9, r9, SZ_PT_REGS - PT_sp - 4
	bnz	1f

lr	r9, [AUX_USER_SP]
1:
	PUSH	r9	; SP

PUSH	fp
	PUSH	gp

#ifdef CONFIG_ARC_CURR_IN_REG
	PUSH	r25			; user_r25
	GET_CURR_TASK_ON_CPU	r25
#else
	sub	sp, sp, 4
#endif

.ifnc \called_from, exception
	sub	sp, sp, 12	; BTA/ECR/orig_r0 placeholder per pt_regs
.endif

.endm

/*------------------------------------------------------------------------*/
.macro INTERRUPT_EPILOGUE	called_from

.ifnc \called_from, exception
	add	sp, sp, 12	; skip BTA/ECR/orig_r0 placeholderss
.endif

#ifdef CONFIG_ARC_CURR_IN_REG
	POP	r25
#else
	add	sp, sp, 4
#endif

POP	gp
	POP	fp

; Don't touch AUX_USER_SP if returning to K mode (Z bit set)
	; (Z bit set on K mode is inverse of INTERRUPT_PROLOGUE)
	add.z	sp, sp, 4
	bz	1f

POPAX	AUX_USER_SP
1:
	POP	r12
	POP	r30

#ifdef CONFIG_ARC_HAS_ACCL_REGS
	POP	r58
	POP	r59
#endif

#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
.ifnc \called_from, exception
	POP	r0
	POP	r1
	POP	r2
	POP	r3
	POP	r4
	POP	r5
	POP	r6
	POP	r7
	POP	r8
	POP	r9
	POP	r10
	POP	r11

POP	blink
	POPAX	lp_end
	POPAX	lp_start

POP	r9
	mov	lp_count, r9

add	sp, sp, 12	; skip JLI, LDI, EI
	ld.as	r9, [sp, -10]	; reload r9 which got clobbered
.endif
#endif

.endm

/*------------------------------------------------------------------------*/
.macro EXCEPTION_PROLOGUE

; Before jumping to Exception Vector, hardware micro-ops did following:
	;   1. SP auto-switched to kernel mode stack
	;   2. STATUS32.Z flag set to U mode at time of interrupt (U:1,K:0)
	;
	; Now manually save the complete reg file

PUSH	r9		; freeup a register: slot of erstatus

PUSHAX	eret
	sub	sp, sp, 12	; skip JLI, LDI, EI
	PUSH	lp_count
	PUSHAX	lp_start
	PUSHAX	lp_end
	PUSH	blink

PUSH	r11
	PUSH	r10

ld.as	r9,  [sp, 10]	; load stashed r9 (status32 stack slot)
	lr	r10, [erstatus]
	st.as	r10, [sp, 10]	; save status32 at it's right stack slot

PUSH	r9
	PUSH	r8
	PUSH	r7
	PUSH	r6
	PUSH	r5
	PUSH	r4
	PUSH	r3
	PUSH	r2
	PUSH	r1
	PUSH	r0

; -- for interrupts, regs above are auto-saved by h/w in that order --
	; Now do what ISR prologue does (manually save r12, sp, fp, gp, r25)
	;
	; Set Z flag if this was from U mode (expected by INTERRUPT_PROLOGUE)
	; Although H/w exception micro-ops do set Z flag for U mode (just like
	; for interrupts), it could get clobbered in case we soft land here from
	; a TLB Miss exception handler (tlbex.S)

and	r10, r10, STATUS_U_MASK
	xor.f	0, r10, STATUS_U_MASK

INTERRUPT_PROLOGUE  exception

PUSHAX	erbta
	PUSHAX	ecr		; r9 contains ECR, expected by EV_Trap

PUSH	r0		; orig_r0
.endm

/*------------------------------------------------------------------------*/
.macro EXCEPTION_EPILOGUE

; Assumes r0 has PT_status32
	btst   r0, STATUS_U_BIT	; Z flag set if K, used in INTERRUPT_EPILOGUE

add	sp, sp, 8	; orig_r0/ECR don't need restoring
	POPAX	erbta

INTERRUPT_EPILOGUE  exception

POP	r0
	POP	r1
	POP	r2
	POP	r3
	POP	r4
	POP	r5
	POP	r6
	POP	r7
	POP	r8
	POP	r9
	POP	r10
	POP	r11

POP	blink
	POPAX	lp_end
	POPAX	lp_start

POP	r9
	mov	lp_count, r9

add	sp, sp, 12	; skip JLI, LDI, EI
	POPAX	eret
	POPAX	erstatus

ld.as	r9, [sp, -12]	; reload r9 which got clobbered
.endm

.macro FAKE_RET_FROM_EXCPN
	lr      r9, [status32]
	bic     r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK)
	or      r9, r9, (STATUS_L_MASK|STATUS_IE_MASK)
	kflag   r9
.endm

/* Get thread_info of "current" tsk */
.macro GET_CURR_THR_INFO_FROM_SP  reg
	bmskn \reg, sp, THREAD_SHIFT - 1
.endm

/* Get CPU-ID of this core */
.macro  GET_CPU_ID  reg
	lr  \reg, [identity]
	xbfu \reg, \reg, 0xE8	/* 00111    01000 */
				/* M = 8-1  N = 8 */
.endm

#endif