OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:16 AM	rwxr-xr-x
📄 Kbuild	610 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 agp.h	596 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asmregs.h	3.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 assembly.h	12.94 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 atomic.h	8.24 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 barrier.h	2.44 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 bitops.h	5.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	2.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	340 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	1.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	4.06 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 checksum.h	5.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	3.62 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 compat.h	6.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 compat_ucontext.h	591 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	533 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	2.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	5.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dwarf.h	602 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 eisa_bus.h	702 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 eisa_eeprom.h	4.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	14.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fb.h	403 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	1.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 floppy.h	6.61 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	379 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 grfioctl.h	4.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardware.h	4.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hash.h	5.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hugetlb.h	1.67 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ide.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	8.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	1.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kbdleds.h	477 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	221 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ldcw.h	2.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 led.h	1.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	759 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 machdep.h	349 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mckinley.h	270 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	195 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmzone.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	527 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	5.42 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 parisc-device.h	1.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 parport.h	358 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	6.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pdc.h	3.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pdc_chassis.h	15.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pdcpat.h	15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf.h	1.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	152 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	4.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	18.92 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 prefetch.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	9.86 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 psw.h	2.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	803 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 ropes.h	9.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rt_sigframe.h	745 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 runway.h	320 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	283 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	124 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	263 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	841 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	1.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 socket.h	311 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 special_insns.h	1015 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	4.02 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 spinlock_types.h	483 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	247 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 superio.h	3.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	332 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 termios.h	1.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	372 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 tlb.h	672 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	2.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	900 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 traps.h	468 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	6.55 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucontext.h	327 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	472 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	5.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwind.h	2.56 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: bitops.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _PARISC_BITOPS_H
#define _PARISC_BITOPS_H

#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif

#include <linux/compiler.h>
#include <asm/types.h>
#include <asm/byteorder.h>
#include <asm/barrier.h>
#include <linux/atomic.h>

/*
 * HP-PARISC specific bit operations
 * for a detailed description of the functions please refer
 * to include/asm-i386/bitops.h or kerneldoc
 */

#if __BITS_PER_LONG == 64
#define SHIFT_PER_LONG 6
#else
#define SHIFT_PER_LONG 5
#endif

#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))

/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
 * on use of volatile and __*_bit() (set/clear/change):
 *	*_bit() want use of volatile.
 *	__*_bit() are "relaxed" and don't use spinlock or volatile.
 */

static __inline__ void set_bit(int nr, volatile unsigned long * addr)
{
	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
	unsigned long flags;

addr += (nr >> SHIFT_PER_LONG);
	_atomic_spin_lock_irqsave(addr, flags);
	*addr |= mask;
	_atomic_spin_unlock_irqrestore(addr, flags);
}

static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
{
	unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
	unsigned long flags;

addr += (nr >> SHIFT_PER_LONG);
	_atomic_spin_lock_irqsave(addr, flags);
	*addr &= mask;
	_atomic_spin_unlock_irqrestore(addr, flags);
}

static __inline__ void change_bit(int nr, volatile unsigned long * addr)
{
	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
	unsigned long flags;

addr += (nr >> SHIFT_PER_LONG);
	_atomic_spin_lock_irqsave(addr, flags);
	*addr ^= mask;
	_atomic_spin_unlock_irqrestore(addr, flags);
}

static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
{
	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
	unsigned long old;
	unsigned long flags;
	int set;

addr += (nr >> SHIFT_PER_LONG);
	_atomic_spin_lock_irqsave(addr, flags);
	old = *addr;
	set = (old & mask) ? 1 : 0;
	if (!set)
		*addr = old | mask;
	_atomic_spin_unlock_irqrestore(addr, flags);

return set;
}

static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
{
	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
	unsigned long old;
	unsigned long flags;
	int set;

addr += (nr >> SHIFT_PER_LONG);
	_atomic_spin_lock_irqsave(addr, flags);
	old = *addr;
	set = (old & mask) ? 1 : 0;
	if (set)
		*addr = old & ~mask;
	_atomic_spin_unlock_irqrestore(addr, flags);

return set;
}

static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
{
	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
	unsigned long oldbit;
	unsigned long flags;

addr += (nr >> SHIFT_PER_LONG);
	_atomic_spin_lock_irqsave(addr, flags);
	oldbit = *addr;
	*addr = oldbit ^ mask;
	_atomic_spin_unlock_irqrestore(addr, flags);

return (oldbit & mask) ? 1 : 0;
}

#include <asm-generic/bitops/non-atomic.h>

#ifdef __KERNEL__

/**
 * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
 * @word: The word to search
 *
 * __ffs() return is undefined if no bit is set.
 *
 * 32-bit fast __ffs by LaMont Jones "lamont At hp com".
 * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
 * (with help from willy/jejb to get the semantics right)
 *
 * This algorithm avoids branches by making use of nullification.
 * One side effect of "extr" instructions is it sets PSW[N] bit.
 * How PSW[N] (nullify next insn) gets set is determined by the 
 * "condition" field (eg "<>" or "TR" below) in the extr* insn.
 * Only the 1st and one of either the 2cd or 3rd insn will get executed.
 * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
 * cycles for each mispredicted branch.
 */

static __inline__ unsigned long __ffs(unsigned long x)
{
	unsigned long ret;

__asm__(
#ifdef CONFIG_64BIT
		" ldi       63,%1\n"
		" extrd,u,*<>  %0,63,32,%%r0\n"
		" extrd,u,*TR  %0,31,32,%0\n"	/* move top 32-bits down */
		" addi    -32,%1,%1\n"
#else
		" ldi       31,%1\n"
#endif
		" extru,<>  %0,31,16,%%r0\n"
		" extru,TR  %0,15,16,%0\n"	/* xxxx0000 -> 0000xxxx */
		" addi    -16,%1,%1\n"
		" extru,<>  %0,31,8,%%r0\n"
		" extru,TR  %0,23,8,%0\n"	/* 0000xx00 -> 000000xx */
		" addi    -8,%1,%1\n"
		" extru,<>  %0,31,4,%%r0\n"
		" extru,TR  %0,27,4,%0\n"	/* 000000x0 -> 0000000x */
		" addi    -4,%1,%1\n"
		" extru,<>  %0,31,2,%%r0\n"
		" extru,TR  %0,29,2,%0\n"	/* 0000000y, 1100b -> 0011b */
		" addi    -2,%1,%1\n"
		" extru,=  %0,31,1,%%r0\n"	/* check last bit */
		" addi    -1,%1,%1\n"
			: "+r" (x), "=r" (ret) );
	return ret;
}

#include <asm-generic/bitops/ffz.h>

/*
 * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
 * This is defined the same way as the libc and compiler builtin
 * ffs routines, therefore differs in spirit from the above ffz (man ffs).
 */
static __inline__ int ffs(int x)
{
	return x ? (__ffs((unsigned long)x) + 1) : 0;
}

/*
 * fls: find last (most significant) bit set.
 * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
 */

static __inline__ int fls(int x)
{
	int ret;
	if (!x)
		return 0;

__asm__(
	"	ldi		1,%1\n"
	"	extru,<>	%0,15,16,%%r0\n"
	"	zdep,TR		%0,15,16,%0\n"		/* xxxx0000 */
	"	addi		16,%1,%1\n"
	"	extru,<>	%0,7,8,%%r0\n"
	"	zdep,TR		%0,23,24,%0\n"		/* xx000000 */
	"	addi		8,%1,%1\n"
	"	extru,<>	%0,3,4,%%r0\n"
	"	zdep,TR		%0,27,28,%0\n"		/* x0000000 */
	"	addi		4,%1,%1\n"
	"	extru,<>	%0,1,2,%%r0\n"
	"	zdep,TR		%0,29,30,%0\n"		/* y0000000 (y&3 = 0) */
	"	addi		2,%1,%1\n"
	"	extru,=		%0,0,1,%%r0\n"
	"	addi		1,%1,%1\n"		/* if y & 8, add 1 */
		: "+r" (x), "=r" (ret) );

return ret;
}

#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/hweight.h>
#include <asm-generic/bitops/lock.h>
#include <asm-generic/bitops/sched.h>

#endif /* __KERNEL__ */

#include <asm-generic/bitops/find.h>

#ifdef __KERNEL__

#include <asm-generic/bitops/le.h>
#include <asm-generic/bitops/ext2-atomic-setbit.h>

#endif	/* __KERNEL__ */

#endif /* _PARISC_BITOPS_H */