OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:17 AM	rwxr-xr-x
📄 ahb.h	674 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bpmp-abi.h	50.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bpmp.h	4.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 common.h	364 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpuidle.h	795 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 emc.h	551 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 flowctrl.h	2.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fuse.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ivc.h	3.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc.h	2.3 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 pm.h	986 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pmc.h	5.84 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: mc.h

/*
 * Copyright (C) 2014 NVIDIA Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __SOC_TEGRA_MC_H__
#define __SOC_TEGRA_MC_H__

#include <linux/types.h>

struct clk;
struct device;
struct page;

struct tegra_smmu_enable {
	unsigned int reg;
	unsigned int bit;
};

struct tegra_mc_timing {
	unsigned long rate;

u32 *emem_data;
};

/* latency allowance */
struct tegra_mc_la {
	unsigned int reg;
	unsigned int shift;
	unsigned int mask;
	unsigned int def;
};

struct tegra_mc_client {
	unsigned int id;
	const char *name;
	unsigned int swgroup;

unsigned int fifo_size;

struct tegra_smmu_enable smmu;
	struct tegra_mc_la la;
};

struct tegra_smmu_swgroup {
	const char *name;
	unsigned int swgroup;
	unsigned int reg;
};

struct tegra_smmu_soc {
	const struct tegra_mc_client *clients;
	unsigned int num_clients;

const struct tegra_smmu_swgroup *swgroups;
	unsigned int num_swgroups;

bool supports_round_robin_arbitration;
	bool supports_request_limit;

unsigned int num_tlb_lines;
	unsigned int num_asids;
};

struct tegra_mc;
struct tegra_smmu;

#ifdef CONFIG_TEGRA_IOMMU_SMMU
struct tegra_smmu *tegra_smmu_probe(struct device *dev,
				    const struct tegra_smmu_soc *soc,
				    struct tegra_mc *mc);
void tegra_smmu_remove(struct tegra_smmu *smmu);
#else
static inline struct tegra_smmu *
tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
		 struct tegra_mc *mc)
{
	return NULL;
}

static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
{
}
#endif

struct tegra_mc_soc {
	const struct tegra_mc_client *clients;
	unsigned int num_clients;

const unsigned long *emem_regs;
	unsigned int num_emem_regs;

unsigned int num_address_bits;
	unsigned int atom_size;

u8 client_id_mask;

const struct tegra_smmu_soc *smmu;

u32 intmask;
};

struct tegra_mc {
	struct device *dev;
	struct tegra_smmu *smmu;
	void __iomem *regs;
	struct clk *clk;
	int irq;

const struct tegra_mc_soc *soc;
	unsigned long tick;

struct tegra_mc_timing *timings;
	unsigned int num_timings;
};

void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);

#endif /* __SOC_TEGRA_MC_H__ */