OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:15 AM	rwxr-xr-x
📄 Kbuild	290 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	4.97 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic_defs.h	4.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ax88796.h	751 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	720 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bitops.h	7.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bug.h	1.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bugs.h	445 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 busctl-regs.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	727 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	3.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 checksum.h	4.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	4.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpu-irqs.h	2.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 current.h	685 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	1.28 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 div64.h	31 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dm9000.h	1.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	448 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma.h	3.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	5.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 emergency-restart.h	149 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 fpu.h	261 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ftrace.h	12 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	416 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 gdb-stub.h	4.47 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 gpio-regs.h	3.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hardirq.h	666 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 highmem.h	4.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hw_irq.h	484 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	9.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irc-regs.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	760 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq_regs.h	764 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	3.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kdebug.h	32 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 kmap_types.h	123 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	114 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local.h	140 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 local64.h	33 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 math-emu.h	6.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mb-regs.h	6.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mb86943a.h	1.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mb93091-fpga-irqs.h	1.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mb93093-fpga-irqs.h	789 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mb93493-irqs.h	1.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mb93493-regs.h	12.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mem-layout.h	2.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	1.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	1.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 module.h	617 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 percpu.h	147 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 perf_event.h	487 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	1.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	16.02 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 processor.h	2.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	1.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sections.h	1.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 segment.h	1.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial-regs.h	1.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	308 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 setup.h	641 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 shmparam.h	183 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 signal.h	141 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	139 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	516 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spr-regs.h	17.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	1.36 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 switch_to.h	1.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	2.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 termios.h	425 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.48 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timer-regs.h	3.63 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	720 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlb.h	615 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	1.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 topology.h	229 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 types.h	595 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	6.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucontext.h	281 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unaligned.h	694 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 unistd.h	928 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 user.h	3.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 vga.h	464 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 virtconvert.h	1.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 xor.h	29 bytes	01/28/2018 09:20:33 PM	rw-r--r--

Editing: mb-regs.h

/* mb-regs.h: motherboard registers
 *
 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_MB_REGS_H
#define _ASM_MB_REGS_H

#include <asm/cpu-irqs.h>
#include <asm/sections.h>
#include <asm/mem-layout.h>

#ifndef __ASSEMBLY__
/* gcc builtins, annotated */

unsigned long __builtin_read8(volatile void __iomem *);
unsigned long __builtin_read16(volatile void __iomem *);
unsigned long __builtin_read32(volatile void __iomem *);
void __builtin_write8(volatile void __iomem *, unsigned char);
void __builtin_write16(volatile void __iomem *, unsigned short);
void __builtin_write32(volatile void __iomem *, unsigned long);
#endif

#define __region_IO	KERNEL_IO_START	/* the region from 0xe0000000 to 0xffffffff has suitable
					 * protection laid over the top for use in memory-mapped
					 * I/O
					 */

#define __region_CS0	0xff000000	/* Boot ROMs area */

#ifdef CONFIG_MB93091_VDK
/*
 * VDK motherboard and CPU card specific stuff
 */

#include <asm/mb93091-fpga-irqs.h>

#define IRQ_CPU_MB93493_0	IRQ_CPU_EXTERNAL0
#define IRQ_CPU_MB93493_1	IRQ_CPU_EXTERNAL1

#define __region_CS2	0xe0000000	/* SLBUS/PCI I/O space */
#define __region_CS2_M		0x0fffffff /* mask */
#define __region_CS2_C		0x00000000 /* control */
#define __region_CS5	0xf0000000	/* MB93493 CSC area (DAV daughter board) */
#define __region_CS5_M		0x00ffffff
#define __region_CS5_C		0x00010000
#define __region_CS7	0xf1000000	/* CB70 CPU-card PCMCIA port I/O space */
#define __region_CS7_M		0x00ffffff
#define __region_CS7_C		0x00410701
#define __region_CS1	0xfc000000	/* SLBUS/PCI bridge control registers */
#define __region_CS1_M		0x000fffff
#define __region_CS1_C		0x00000000
#define __region_CS6	0xfc100000	/* CB70 CPU-card DM9000 LAN I/O space */
#define __region_CS6_M		0x000fffff
#define __region_CS6_C		0x00400707
#define __region_CS3	0xfc200000	/* MB93493 CSR area (DAV daughter board) */
#define __region_CS3_M		0x000fffff
#define __region_CS3_C		0xc8100000
#define __region_CS4	0xfd000000	/* CB70 CPU-card extra flash space */
#define __region_CS4_M		0x00ffffff
#define __region_CS4_C		0x00000f07

#define __region_PCI_IO		(__region_CS2 + 0x04000000UL)
#define __region_PCI_MEM	(__region_CS2 + 0x08000000UL)
#define __flush_PCI_writes()						\
do {									\
	__builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0);	\
} while(0)

#define __is_PCI_IO(addr) \
	(((unsigned long)(addr) >> 24) - (__region_PCI_IO >> 24)  < (0x04000000UL >> 24))

#define __is_PCI_MEM(addr) \
	((unsigned long)(addr) - __region_PCI_MEM < 0x08000000UL)

#define __is_PCI_addr(addr) \
	((unsigned long)(addr) - __region_PCI_IO < 0x0c000000UL)

#define __get_CLKSW()	({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; })
#define __get_CLKIN()	(__get_CLKSW() * 125U * 100000U / 24U)

#ifndef __ASSEMBLY__
extern int __nongprelbss mb93090_mb00_detected;
#endif

#define __addr_LEDS()		(__region_CS2 + 0x01200004UL)
#ifdef CONFIG_MB93090_MB00
#define __set_LEDS(X)							\
do {									\
	if (mb93090_mb00_detected)					\
		__builtin_write32((void __iomem *) __addr_LEDS(), ~(X));	\
} while (0)
#else
#define __set_LEDS(X)
#endif

#define __addr_LCD()		(__region_CS2 + 0x01200008UL)
#define __get_LCD(B)		__builtin_read32((volatile void __iomem *) (B))
#define __set_LCD(B,X)		__builtin_write32((volatile void __iomem *) (B), (X))

#define LCD_D			0x000000ff		/* LCD data bus */
#define LCD_RW			0x00000100		/* LCD R/W signal */
#define LCD_RS			0x00000200		/* LCD Register Select */
#define LCD_E			0x00000400		/* LCD Start Enable Signal */

#else
/*
 * PDK unit specific stuff
 */

#include <asm/mb93093-fpga-irqs.h>

#define IRQ_CPU_MB93493_0	IRQ_CPU_EXTERNAL0
#define IRQ_CPU_MB93493_1	IRQ_CPU_EXTERNAL1

#define __region_CS5	0xf0000000	/* MB93493 CSC area (DAV daughter board) */
#define __region_CS5_M		0x00ffffff /* mask */
#define __region_CS5_C		0x00010000 /* control */
#define __region_CS2	0x20000000	/* FPGA registers */
#define __region_CS2_M		0x000fffff
#define __region_CS2_C		0x00000000
#define __region_CS1	0xfc100000	/* LAN registers */
#define __region_CS1_M		0x000fffff
#define __region_CS1_C		0x00010404
#define __region_CS3	0xfc200000	/* MB93493 CSR area (DAV daughter board) */
#define __region_CS3_M		0x000fffff
#define __region_CS3_C		0xc8000000
#define __region_CS4	0xfd000000	/* extra ROMs area */
#define __region_CS4_M		0x00ffffff
#define __region_CS4_C		0x00000f07

#define __region_CS6	0xfe000000	/* not used - hide behind CPU resource I/O regs */
#define __region_CS6_M		0x000fffff
#define __region_CS6_C		0x00000f07
#define __region_CS7	0xfe000000	/* not used - hide behind CPU resource I/O regs */
#define __region_CS7_M		0x000fffff
#define __region_CS7_C		0x00000f07

#define __is_PCI_IO(addr)	0	/* no PCI */
#define __is_PCI_MEM(addr)	0
#define __is_PCI_addr(addr)	0
#define __region_PCI_IO		0
#define __region_PCI_MEM	0
#define __flush_PCI_writes()	do { } while(0)

#define __get_CLKSW()		0UL
#define __get_CLKIN()		66000000UL

#define __addr_LEDS()		(__region_CS2 + 0x00000023UL)
#define __set_LEDS(X)		__builtin_write8((volatile void __iomem *) __addr_LEDS(), (X))

#define __addr_FPGATR()		(__region_CS2 + 0x00000030UL)
#define __set_FPGATR(X)		__builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X))
#define __get_FPGATR()		__builtin_read32((volatile void __iomem *) __addr_FPGATR())

#define MB93093_FPGA_FPGATR_AUDIO_CLK	0x00000003

#define __set_FPGATR_AUDIO_CLK(V) \
	__set_FPGATR((__get_FPGATR() & ~MB93093_FPGA_FPGATR_AUDIO_CLK) | (V))

#define MB93093_FPGA_FPGATR_AUDIO_CLK_OFF	0x0
#define MB93093_FPGA_FPGATR_AUDIO_CLK_11MHz	0x1
#define MB93093_FPGA_FPGATR_AUDIO_CLK_12MHz	0x2
#define MB93093_FPGA_FPGATR_AUDIO_CLK_02MHz	0x3

#define MB93093_FPGA_SWR_PUSHSWMASK	(0x1F<<26)
#define MB93093_FPGA_SWR_PUSHSW4	(1<<29)

#define __addr_FPGA_SWR		((volatile void __iomem *)(__region_CS2 + 0x28UL))
#define __get_FPGA_PUSHSW1_5()	(__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK)

#endif

#endif /* _ASM_MB_REGS_H */