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05/09/2024 07:14:13 AM
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Kbuild
958 bytes
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asm-macros.h
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asm-offsets.h
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cache.h
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cacheflush.h
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checksum.h
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cpuinfo.h
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delay.h
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dma-mapping.h
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elf.h
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entry.h
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io.h
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irq.h
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irqflags.h
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kgdb.h
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linkage.h
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mmu.h
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mmu_context.h
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page.h
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pgalloc.h
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pgtable-bits.h
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pgtable.h
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processor.h
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ptrace.h
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registers.h
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setup.h
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shmparam.h
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string.h
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switch_to.h
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syscall.h
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syscalls.h
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thread_info.h
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timex.h
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tlb.h
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tlbflush.h
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traps.h
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uaccess.h
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Editing: tlb.h
Close
/* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2009 Wind River Systems Inc * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_TLB_H #define _ASM_NIOS2_TLB_H #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) extern void set_mmu_pid(unsigned long pid); /* * NiosII doesn't need any special per-pte or per-vma handling, except * we need to flush cache for the area to be unmapped. */ #define tlb_start_vma(tlb, vma) \ do { \ if (!tlb->fullmm) \ flush_cache_range(vma, vma->vm_start, vma->vm_end); \ } while (0) #define tlb_end_vma(tlb, vma) do { } while (0) #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) #include <linux/pagemap.h> #include <asm-generic/tlb.h> #endif /* _ASM_NIOS2_TLB_H */