OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 88pm80x.h	9.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 88pm860x.h	13.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
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📄 ab3100.h	4.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 abx500	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 abx500.h	11.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ac100.h	6.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 adp5520.h	8.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 altera-a10sr.h	3.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 arizona	-	11/17/2022 06:42:23 AM	rwxr-xr-x
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📄 asic3.h	12.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atmel-hlcdc.h	2.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 axp20x.h	16.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bcm590xx.h	831 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bd9571mwv.h	3.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core.h	4.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec.h	10.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec_commands.h	84.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec_lpc_mec.h	2.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec_lpc_reg.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 da8xx-cfgchip.h	7.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 da903x.h	7.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 da9052	-	11/17/2022 06:42:23 AM	rwxr-xr-x
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📁 da9063	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📁 da9150	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 davinci_voicecodec.h	3.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 db8500-prcmu.h	21.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dbx500-prcmu.h	14.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dln2.h	3.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dm355evm_msp.h	2.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ds1wm.h	817 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ezx-pcap.h	7.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hi6421-pmic.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hi655x-pmic.h	2.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 htc-pasic3.h	1.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 imx25-tsadc.h	4.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_msic.h	15.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_soc_pmic.h	1.17 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 intel_soc_pmic_bxtwc.h	2 KB	01/28/2018 09:20:33 PM	rw-r--r--
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📄 kempld.h	4.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lm3533.h	2.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp3943.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp873x.h	8.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp87565.h	7.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp8788-isink.h	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp8788.h	8.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lpc_ich.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max14577-private.h	15.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max14577.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77620.h	10.87 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 max77686-private.h	13.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77686.h	2.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77693-common.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77693-private.h	17.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77693.h	2.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77843-private.h	15.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8907.h	7.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8925.h	7.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8997-private.h	12.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8997.h	6.04 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 max8998-private.h	5.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8998.h	3.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc13783.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc13892.h	938 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc13xxx.h	7.65 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 mcp.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 menelaus.h	1.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 motorola-cpcap.h	12.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 mt6323	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📁 mt6397	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 mxs-lradc.h	6.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 palmas.h	149.07 KB	11/01/2022 04:52:05 PM	rw-r--r--
📁 pcf50633	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 qcom_rpm.h	293 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 rc5t583.h	9.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rdc321x.h	591 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 retu.h	723 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 rk808.h	12.51 KB	11/01/2022 04:52:05 PM	rw-r--r--
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📄 rt5033-private.h	7.84 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 rt5033.h	1.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 samsung	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 si476x-core.h	15.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 si476x-platform.h	6.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 si476x-reports.h	4.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sky81452.h	990 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smsc.h	2.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sta2x11-mfd.h	18.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stm32-lptimer.h	1.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stm32-timers.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stmpe.h	3.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stw481x.h	1.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun4i-gpadc.h	3.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 syscon	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 syscon.h	1.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 t7l66xb.h	771 bytes	11/01/2022 04:52:05 PM	rw-r--r--
📄 tc3589x.h	3.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tc6387xb.h	516 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tc6393xb.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ti-lmu-register.h	7.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ti-lmu.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ti_am335x_tscadc.h	5.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tmio.h	4.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps6105x.h	3.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65010.h	6.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps6507x.h	4.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65086.h	3.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65090.h	4.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65217.h	8.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65218.h	7.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps6586x.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65910.h	30.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65912.h	9.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps68470.h	3.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps80031.h	19.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 twl.h	25.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 twl4030-audio.h	8.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 twl6040.h	7.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucb1x00.h	6.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 viperboard.h	2.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 wl1273-core.h	8.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 wm831x	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📁 wm8350	-	11/17/2022 06:42:23 AM	rwxr-xr-x
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📄 wm8400-private.h	57.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
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📁 wm8994	-	11/17/2022 06:42:23 AM	rwxr-xr-x
📄 wm97xx.h	576 bytes	01/28/2018 09:20:33 PM	rw-r--r--

Editing: lp87565.h

/*
 * Functions to access LP87565 power management chip.
 *
 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 */

#ifndef __LINUX_MFD_LP87565_H
#define __LINUX_MFD_LP87565_H

#include <linux/i2c.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>

enum lp87565_device_type {
	LP87565_DEVICE_TYPE_UNKNOWN	= 0,
	LP87565_DEVICE_TYPE_LP87565_Q1,
};

/* All register addresses */
#define LP87565_REG_DEV_REV		0X00
#define LP87565_REG_OTP_REV		0X01
#define LP87565_REG_BUCK0_CTRL_1		0X02
#define LP87565_REG_BUCK0_CTRL_2		0X03

#define LP87565_REG_BUCK1_CTRL_1		0X04
#define LP87565_REG_BUCK1_CTRL_2		0X05

#define LP87565_REG_BUCK2_CTRL_1		0X06
#define LP87565_REG_BUCK2_CTRL_2		0X07

#define LP87565_REG_BUCK3_CTRL_1		0X08
#define LP87565_REG_BUCK3_CTRL_2		0X09

#define LP87565_REG_BUCK0_VOUT			0X0A
#define LP87565_REG_BUCK0_FLOOR_VOUT		0X0B

#define LP87565_REG_BUCK1_VOUT			0X0C
#define LP87565_REG_BUCK1_FLOOR_VOUT		0X0D

#define LP87565_REG_BUCK2_VOUT			0X0E
#define LP87565_REG_BUCK2_FLOOR_VOUT		0X0F

#define LP87565_REG_BUCK3_VOUT			0X10
#define LP87565_REG_BUCK3_FLOOR_VOUT		0X11

#define LP87565_REG_BUCK0_DELAY			0X12
#define LP87565_REG_BUCK1_DELAY			0X13

#define LP87565_REG_BUCK2_DELAY			0X14
#define LP87565_REG_BUCK3_DELAY			0X15

#define LP87565_REG_GPO2_DELAY			0X16
#define LP87565_REG_GPO3_DELAY			0X17
#define LP87565_REG_RESET			0X18
#define LP87565_REG_CONFIG			0X19

#define LP87565_REG_INT_TOP_1			0X1A
#define LP87565_REG_INT_TOP_2			0X1B

#define LP87565_REG_INT_BUCK_0_1		0X1C
#define LP87565_REG_INT_BUCK_2_3		0X1D
#define LP87565_REG_TOP_STAT			0X1E
#define LP87565_REG_BUCK_0_1_STAT		0X1F
#define LP87565_REG_BUCK_2_3_STAT		0x20

#define LP87565_REG_TOP_MASK_1			0x21
#define LP87565_REG_TOP_MASK_2			0x22

#define LP87565_REG_BUCK_0_1_MASK		0x23
#define LP87565_REG_BUCK_2_3_MASK		0x24
#define LP87565_REG_SEL_I_LOAD			0x25

#define LP87565_REG_I_LOAD_2			0x26
#define LP87565_REG_I_LOAD_1			0x27

#define LP87565_REG_PGOOD_CTRL1			0x28
#define LP87565_REG_PGOOD_CTRL2			0x29
#define LP87565_REG_PGOOD_FLT			0x2A
#define LP87565_REG_PLL_CTRL			0x2B
#define LP87565_REG_PIN_FUNCTION		0x2C
#define LP87565_REG_GPIO_CONFIG			0x2D
#define LP87565_REG_GPIO_IN			0x2E
#define LP87565_REG_GPIO_OUT			0x2F

#define LP87565_REG_MAX			LP87565_REG_GPIO_OUT

/* Register field definitions */
#define LP87565_DEV_REV_DEV_ID			0xC0
#define LP87565_DEV_REV_ALL_LAYER		0x30
#define LP87565_DEV_REV_METAL_LAYER		0x0F

#define LP87565_OTP_REV_OTP_ID			0xFF

#define LP87565_BUCK_CTRL_1_EN			BIT(7)
#define LP87565_BUCK_CTRL_1_EN_PIN_CTRL		BIT(6)
#define LP87565_BUCK_CTRL_1_PIN_SELECT_EN	0x30

#define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN	BIT(3)
#define LP87565_BUCK_CTRL_1_RDIS_EN		BIT(2)
#define LP87565_BUCK_CTRL_1_FPWM		BIT(1)
/* Bit0 is reserved for BUCK1 and BUCK3 and valid only for BUCK0 and BUCK2 */
#define LP87565_BUCK_CTRL_1_FPWM_MP_0_2		BIT(0)

#define LP87565_BUCK_CTRL_2_ILIM		0x38
#define LP87565_BUCK_CTRL_2_SLEW_RATE		0x07

#define LP87565_BUCK_VSET			0xFF
#define LP87565_BUCK_FLOOR_VSET			0xFF

#define LP87565_BUCK_SHUTDOWN_DELAY		0xF0
#define LP87565_BUCK_STARTUP_DELAY		0x0F

#define LP87565_GPIO_SHUTDOWN_DELAY		0xF0
#define LP87565_GPIO_STARTUP_DELAY		0x0F

#define LP87565_RESET_SW_RESET			BIT(0)

#define LP87565_CONFIG_DOUBLE_DELAY		BIT(7)
#define LP87565_CONFIG_CLKIN_PD			BIT(6)
#define LP87565_CONFIG_EN4_PD			BIT(5)
#define LP87565_CONFIG_EN3_PD			BIT(4)
#define LP87565_CONFIG_TDIE_WARN_LEVEL		BIT(3)
#define LP87565_CONFIG_EN2_PD			BIT(2)
#define LP87565_CONFIG_EN1_PD			BIT(1)

#define LP87565_INT_GPIO			BIT(7)
#define LP87565_INT_BUCK23			BIT(6)
#define LP87565_INT_BUCK01			BIT(5)
#define LP87565_NO_SYNC_CLK			BIT(4)
#define LP87565_TDIE_SD				BIT(3)
#define LP87565_TDIE_WARN			BIT(2)
#define LP87565_INT_OVP				BIT(1)
#define LP87565_I_LOAD_READY			BIT(0)

#define LP87565_INT_TOP2_RESET_REG		BIT(0)

#define LP87565_BUCK1_PG_INT			BIT(6)
#define LP87565_BUCK1_SC_INT			BIT(5)
#define LP87565_BUCK1_ILIM_INT			BIT(4)
#define LP87565_BUCK0_PG_INT			BIT(2)
#define LP87565_BUCK0_SC_INT			BIT(1)
#define LP87565_BUCK0_ILIM_INT			BIT(0)

#define LP87565_BUCK3_PG_INT			BIT(6)
#define LP87565_BUCK3_SC_INT			BIT(5)
#define LP87565_BUCK3_ILIM_INT			BIT(4)
#define LP87565_BUCK2_PG_INT			BIT(2)
#define LP87565_BUCK2_SC_INT			BIT(1)
#define LP87565_BUCK2_ILIM_INT			BIT(0)

#define LP87565_SYNC_CLK_STAT			BIT(4)
#define LP87565_TDIE_SD_STAT			BIT(3)
#define LP87565_TDIE_WARN_STAT			BIT(2)
#define LP87565_OVP_STAT			BIT(1)

#define LP87565_BUCK1_STAT			BIT(7)
#define LP87565_BUCK1_PG_STAT			BIT(6)
#define LP87565_BUCK1_ILIM_STAT			BIT(4)
#define LP87565_BUCK0_STAT			BIT(3)
#define LP87565_BUCK0_PG_STAT			BIT(2)
#define LP87565_BUCK0_ILIM_STAT			BIT(0)

#define LP87565_BUCK3_STAT			BIT(7)
#define LP87565_BUCK3_PG_STAT			BIT(6)
#define LP87565_BUCK3_ILIM_STAT			BIT(4)
#define LP87565_BUCK2_STAT			BIT(3)
#define LP87565_BUCK2_PG_STAT			BIT(2)
#define LP87565_BUCK2_ILIM_STAT			BIT(0)

#define LPL87565_GPIO_MASK			BIT(7)
#define LPL87565_SYNC_CLK_MASK			BIT(4)
#define LPL87565_TDIE_WARN_MASK			BIT(2)
#define LPL87565_I_LOAD_READY_MASK		BIT(0)

#define LPL87565_RESET_REG_MASK			BIT(0)

#define LPL87565_BUCK1_PG_MASK			BIT(6)
#define LPL87565_BUCK1_ILIM_MASK		BIT(4)
#define LPL87565_BUCK0_PG_MASK			BIT(2)
#define LPL87565_BUCK0_ILIM_MASK		BIT(0)

#define LPL87565_BUCK3_PG_MASK			BIT(6)
#define LPL87565_BUCK3_ILIM_MASK		BIT(4)
#define LPL87565_BUCK2_PG_MASK			BIT(2)
#define LPL87565_BUCK2_ILIM_MASK		BIT(0)

#define LP87565_LOAD_CURRENT_BUCK_SELECT	0x3

#define LP87565_I_LOAD2_BUCK_LOAD_CURRENT	0x3
#define LP87565_I_LOAD1_BUCK_LOAD_CURRENT	0xFF

#define LP87565_PG3_SEL				0xC0
#define LP87565_PG2_SEL				0x30
#define LP87565_PG1_SEL				0x0C
#define LP87565_PG0_SEL				0x03

#define LP87565_HALF_DAY			BIT(7)
#define LP87565_EN_PG0_NINT			BIT(6)
#define LP87565_PGOOD_SET_DELAY			BIT(5)
#define LP87565_EN_PGFLT_STAT			BIT(4)
#define LP87565_PGOOD_WINDOW			BIT(2)
#define LP87565_PGOOD_OD			BIT(1)
#define LP87565_PGOOD_POL			BIT(0)

#define LP87565_PG3_FLT				BIT(3)
#define LP87565_PG2_FLT				BIT(2)
#define LP87565_PG1_FLT				BIT(1)
#define LP87565_PG0_FLT				BIT(0)

#define LP87565_PLL_MODE			0xC0
#define LP87565_EXT_CLK_FREQ			0x1F

#define LP87565_EN_SPREAD_SPEC			BIT(7)
#define LP87565_EN_PIN_CTRL_GPIO3		BIT(6)
#define LP87565_EN_PIN_SELECT_GPIO3		BIT(5)
#define LP87565_EN_PIN_CTRL_GPIO2		BIT(4)
#define LP87565_EN_PIN_SELECT_GPIO2		BIT(3)
#define LP87565_GPIO3_SEL			BIT(2)
#define LP87565_GPIO2_SEL			BIT(1)
#define LP87565_GPIO1_SEL			BIT(0)

#define LP87565_GOIO3_OD			BIT(6)
#define LP87565_GOIO2_OD			BIT(5)
#define LP87565_GOIO1_OD			BIT(4)
#define LP87565_GOIO3_DIR			BIT(2)
#define LP87565_GOIO2_DIR			BIT(1)
#define LP87565_GOIO1_DIR			BIT(0)

#define LP87565_GOIO3_IN			BIT(2)
#define LP87565_GOIO2_IN			BIT(1)
#define LP87565_GOIO1_IN			BIT(0)

#define LP87565_GOIO3_OUT			BIT(2)
#define LP87565_GOIO2_OUT			BIT(1)
#define LP87565_GOIO1_OUT			BIT(0)

/* Number of step-down converters available */
#define LP87565_NUM_BUCK		6

enum LP87565_regulator_id {
	/* BUCK's */
	LP87565_BUCK_0,
	LP87565_BUCK_1,
	LP87565_BUCK_2,
	LP87565_BUCK_3,
	LP87565_BUCK_10,
	LP87565_BUCK_23,
};

/**
 * struct LP87565 - state holder for the LP87565 driver
 * @dev: struct device pointer for MFD device
 * @rev: revision of the LP87565
 * @dev_type: The device type for example lp87565-q1
 * @lock: lock guarding the data structure
 * @regmap: register map of the LP87565 PMIC
 *
 * Device data may be used to access the LP87565 chip
 */
struct lp87565 {
	struct device *dev;
	u8 rev;
	u8 dev_type;
	struct regmap *regmap;
};
#endif /* __LINUX_MFD_LP87565_H */