OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	11/17/2022 06:42:20 AM	rwxr-xr-x
📄 cvmx-address.h	9.15 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-agl-defs.h	70.87 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-asm.h	5.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-asxx-defs.h	17.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-boot-vector.h	1.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-bootinfo.h	13.44 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cvmx-bootmem.h	14.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-ciu-defs.h	214.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-ciu2-defs.h	173.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-ciu3-defs.h	10.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-cmd-queue.h	18.46 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-config.h	6.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-coremask.h	2.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-dbg-defs.h	2.73 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-dpi-defs.h	27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-fau.h	18.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-fpa-defs.h	37.39 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-fpa.h	8.14 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-gmxx-defs.h	226.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-gpio-defs.h	13.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-board.h	4.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-errata.h	1.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-jtag.h	1.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-loop.h	1.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-npi.h	1.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-rgmii.h	3.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-sgmii.h	3.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-spi.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-util.h	5.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper-xaui.h	3.29 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-helper.h	7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-iob-defs.h	35.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-ipd-defs.h	56.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-ipd.h	10.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-l2c-defs.h	7.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-l2c.h	11.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-l2d-defs.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-l2t-defs.h	5.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-led-defs.h	7.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-lmcx-defs.h	88.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-mio-defs.h	141.79 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-mixx-defs.h	14.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-npei-defs.h	94.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-npi-defs.h	67.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-packet.h	2.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pci-defs.h	56.08 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pciercx-defs.h	11.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pcsx-defs.h	33.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pcsxx-defs.h	25.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pemx-defs.h	20.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pescx-defs.h	15.88 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pexp-defs.h	16.64 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pip-defs.h	87.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pip.h	16.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pko-defs.h	73.09 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pko.h	19.17 KB	11/01/2022 04:52:05 PM	rw-r--r--
📄 cvmx-pow-defs.h	33.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-pow.h	63.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-rnm-defs.h	6.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-rst-defs.h	7.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-scratch.h	3.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-sli-defs.h	3.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-smix-defs.h	11.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-spi.h	8.93 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-spinlock.h	6.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-spxx-defs.h	12.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-sriox-defs.h	42.13 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-srxx-defs.h	4.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-stxx-defs.h	10.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-sysinfo.h	3.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-uctlx-defs.h	12.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx-wqe.h	17.06 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cvmx.h	13.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 octeon-feature.h	6.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 octeon-model.h	16.49 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 octeon.h	12.26 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pci-octeon.h	1.65 KB	01/28/2018 09:20:33 PM	rw-r--r--

Editing: cvmx-spinlock.h

/***********************license start***************
 * Author: Cavium Networks
 *
 * Contact: support@caviumnetworks.com
 * This file is part of the OCTEON SDK
 *
 * Copyright (c) 2003-2008 Cavium Networks
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this file; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 * or visit http://www.gnu.org/licenses/.
 *
 * This file may also be available under a different license from Cavium.
 * Contact Cavium Networks for more information
 ***********************license end**************************************/

/**
 * Implementation of spinlocks for Octeon CVMX.	 Although similar in
 * function to Linux kernel spinlocks, they are not compatible.
 * Octeon CVMX spinlocks are only used to synchronize with the boot
 * monitor and other non-Linux programs running in the system.
 */

#ifndef __CVMX_SPINLOCK_H__
#define __CVMX_SPINLOCK_H__

#include <asm/octeon/cvmx-asm.h>

/* Spinlocks for Octeon */

/* define these to enable recursive spinlock debugging */
/*#define CVMX_SPINLOCK_DEBUG */

/**
 * Spinlocks for Octeon CVMX
 */
typedef struct {
	volatile uint32_t value;
} cvmx_spinlock_t;

/* note - macros not expanded in inline ASM, so values hardcoded */
#define	 CVMX_SPINLOCK_UNLOCKED_VAL  0
#define	 CVMX_SPINLOCK_LOCKED_VAL    1

#define CVMX_SPINLOCK_UNLOCKED_INITIALIZER  {CVMX_SPINLOCK_UNLOCKED_VAL}

/**
 * Initialize a spinlock
 *
 * @lock:   Lock to initialize
 */
static inline void cvmx_spinlock_init(cvmx_spinlock_t *lock)
{
	lock->value = CVMX_SPINLOCK_UNLOCKED_VAL;
}

/**
 * Return non-zero if the spinlock is currently locked
 *
 * @lock:   Lock to check
 * Returns Non-zero if locked
 */
static inline int cvmx_spinlock_locked(cvmx_spinlock_t *lock)
{
	return lock->value != CVMX_SPINLOCK_UNLOCKED_VAL;
}

/**
 * Releases lock
 *
 * @lock:   pointer to lock structure
 */
static inline void cvmx_spinlock_unlock(cvmx_spinlock_t *lock)
{
	CVMX_SYNCWS;
	lock->value = 0;
	CVMX_SYNCWS;
}

/**
 * Attempts to take the lock, but does not spin if lock is not available.
 * May take some time to acquire the lock even if it is available
 * due to the ll/sc not succeeding.
 *
 * @lock:   pointer to lock structure
 *
 * Returns 0: lock successfully taken
 *	   1: lock not taken, held by someone else
 * These return values match the Linux semantics.
 */

static inline unsigned int cvmx_spinlock_trylock(cvmx_spinlock_t *lock)
{
	unsigned int tmp;

__asm__ __volatile__(".set noreorder	     \n"
			     "1: ll   %[tmp], %[val] \n"
			/* if lock held, fail immediately */
			     "	 bnez %[tmp], 2f     \n"
			     "	 li   %[tmp], 1	     \n"
			     "	 sc   %[tmp], %[val] \n"
			     "	 beqz %[tmp], 1b     \n"
			     "	 li   %[tmp], 0	     \n"
			     "2:		     \n"
			     ".set reorder	     \n" :
			[val] "+m"(lock->value), [tmp] "=&r"(tmp)
			     : : "memory");

return tmp != 0;		/* normalize to 0 or 1 */
}

/**
 * Gets lock, spins until lock is taken
 *
 * @lock:   pointer to lock structure
 */
static inline void cvmx_spinlock_lock(cvmx_spinlock_t *lock)
{
	unsigned int tmp;

__asm__ __volatile__(".set noreorder	     \n"
			     "1: ll   %[tmp], %[val]  \n"
			     "	 bnez %[tmp], 1b     \n"
			     "	 li   %[tmp], 1	     \n"
			     "	 sc   %[tmp], %[val] \n"
			     "	 beqz %[tmp], 1b     \n"
			     "	 nop		    \n"
			     ".set reorder	     \n" :
			[val] "+m"(lock->value), [tmp] "=&r"(tmp)
			: : "memory");

}

/** ********************************************************************
 * Bit spinlocks
 * These spinlocks use a single bit (bit 31) of a 32 bit word for locking.
 * The rest of the bits in the word are left undisturbed.  This enables more
 * compact data structures as only 1 bit is consumed for the lock.
 *
 */

/**
 * Gets lock, spins until lock is taken
 * Preserves the low 31 bits of the 32 bit
 * word used for the lock.
 *
 *
 * @word:  word to lock bit 31 of
 */
static inline void cvmx_spinlock_bit_lock(uint32_t *word)
{
	unsigned int tmp;
	unsigned int sav;

__asm__ __volatile__(".set noreorder	     \n"
			     ".set noat		     \n"
			     "1: ll    %[tmp], %[val]  \n"
			     "	 bbit1 %[tmp], 31, 1b	 \n"
			     "	 li    $at, 1	   \n"
			     "	 ins   %[tmp], $at, 31, 1  \n"
			     "	 sc    %[tmp], %[val] \n"
			     "	 beqz  %[tmp], 1b     \n"
			     "	 nop		    \n"
			     ".set at		   \n"
			     ".set reorder	     \n" :
			[val] "+m"(*word), [tmp] "=&r"(tmp), [sav] "=&r"(sav)
			     : : "memory");

}

/**
 * Attempts to get lock, returns immediately with success/failure
 * Preserves the low 31 bits of the 32 bit
 * word used for the lock.
 *
 *
 * @word:  word to lock bit 31 of
 * Returns 0: lock successfully taken
 *	   1: lock not taken, held by someone else
 * These return values match the Linux semantics.
 */
static inline unsigned int cvmx_spinlock_bit_trylock(uint32_t *word)
{
	unsigned int tmp;

__asm__ __volatile__(".set noreorder\n\t"
			     ".set noat\n"
			     "1: ll    %[tmp], %[val] \n"
			/* if lock held, fail immediately */
			     "	 bbit1 %[tmp], 31, 2f	  \n"
			     "	 li    $at, 1	   \n"
			     "	 ins   %[tmp], $at, 31, 1  \n"
			     "	 sc    %[tmp], %[val] \n"
			     "	 beqz  %[tmp], 1b     \n"
			     "	 li    %[tmp], 0      \n"
			     "2:		     \n"
			     ".set at		   \n"
			     ".set reorder	     \n" :
			[val] "+m"(*word), [tmp] "=&r"(tmp)
			: : "memory");

return tmp != 0;		/* normalize to 0 or 1 */
}

/**
 * Releases bit lock
 *
 * Unconditionally clears bit 31 of the lock word.  Note that this is
 * done non-atomically, as this implementation assumes that the rest
 * of the bits in the word are protected by the lock.
 *
 * @word:  word to unlock bit 31 in
 */
static inline void cvmx_spinlock_bit_unlock(uint32_t *word)
{
	CVMX_SYNCWS;
	*word &= ~(1UL << 31);
	CVMX_SYNCWS;
}

#endif /* __CVMX_SPINLOCK_H__ */