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11/17/2022 06:42:15 AM
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Kbuild
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arcregs.h
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asm-offsets.h
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atomic.h
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barrier.h
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bitops.h
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checksum.h
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delay.h
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disasm.h
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irq.h
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irqflags-arcv2.h
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kdebug.h
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linkage.h
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mach_desc.h
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mmu.h
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module.h
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page.h
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pci.h
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pgalloc.h
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sections.h
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segment.h
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serial.h
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setup.h
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shmparam.h
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smp.h
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spinlock.h
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string.h
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switch_to.h
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syscall.h
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syscalls.h
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timex.h
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tlb-mmu1.h
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tlb.h
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tlbflush.h
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uaccess.h
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unaligned.h
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unwind.h
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Editing: barrier.h
Close
/* * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __ASM_BARRIER_H #define __ASM_BARRIER_H #ifdef CONFIG_ISA_ARCV2 /* * ARCv2 based HS38 cores are in-order issue, but still weakly ordered * due to micro-arch buffering/queuing of load/store, cache hit vs. miss ... * * Explicit barrier provided by DMB instruction * - Operand supports fine grained load/store/load+store semantics * - Ensures that selected memory operation issued before it will complete * before any subsequent memory operation of same type * - DMB guarantees SMP as well as local barrier semantics * (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e. * UP: barrier(), SMP: smp_*mb == *mb) * - DSYNC provides DMB+completion_of_cache_bpu_maintenance_ops hence not needed * in the general case. Plus it only provides full barrier. */ #define mb() asm volatile("dmb 3\n" : : : "memory") #define rmb() asm volatile("dmb 1\n" : : : "memory") #define wmb() asm volatile("dmb 2\n" : : : "memory") #elif !defined(CONFIG_ARC_PLAT_EZNPS) /* CONFIG_ISA_ARCOMPACT */ /* * ARCompact based cores (ARC700) only have SYNC instruction which is super * heavy weight as it flushes the pipeline as well. * There are no real SMP implementations of such cores. */ #define mb() asm volatile("sync\n" : : : "memory") #else /* CONFIG_ARC_PLAT_EZNPS */ #include <plat/ctop.h> #define mb() asm volatile (".word %0" : : "i"(CTOP_INST_SCHD_RW) : "memory") #define rmb() asm volatile (".word %0" : : "i"(CTOP_INST_SCHD_RD) : "memory") #endif #include <asm-generic/barrier.h> #endif