OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 88pm80x.h	9.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 88pm860x.h	13.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 aat2870.h	4.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ab3100.h	4.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 abx500	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 abx500.h	11.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ac100.h	6.12 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 adp5520.h	8.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 altera-a10sr.h	3.42 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 arizona	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 as3711.h	2.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 as3722.h	15.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 asic3.h	12.22 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 atmel-hlcdc.h	2.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 axp20x.h	16.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 bcm590xx.h	831 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 bd9571mwv.h	3.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 core.h	4.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec.h	10.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec_commands.h	84.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec_lpc_mec.h	2.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cros_ec_lpc_reg.h	1.9 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 da8xx-cfgchip.h	7.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 da903x.h	7.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 da9052	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📁 da9055	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📁 da9062	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📁 da9063	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📁 da9150	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 davinci_voicecodec.h	3.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 db8500-prcmu.h	21.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dbx500-prcmu.h	14.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dln2.h	3.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 dm355evm_msp.h	2.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ds1wm.h	817 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 ezx-pcap.h	7.75 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hi6421-pmic.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 hi655x-pmic.h	2.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 htc-pasic3.h	1.2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 imx25-tsadc.h	4.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_msic.h	15.99 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 intel_soc_pmic.h	1.17 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 intel_soc_pmic_bxtwc.h	2 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ipaq-micro.h	3.66 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 janz.h	1.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 kempld.h	4.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lm3533.h	2.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp3943.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp873x.h	8.69 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp87565.h	7.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp8788-isink.h	1.19 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lp8788.h	8.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 lpc_ich.h	1.23 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max14577-private.h	15.86 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max14577.h	2.68 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77620.h	10.87 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 max77686-private.h	13.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77686.h	2.65 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77693-common.h	1.27 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77693-private.h	17.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77693.h	2.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max77843-private.h	15.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8907.h	7.52 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8925.h	7.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8997-private.h	12.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8997.h	6.04 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 max8998-private.h	5.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 max8998.h	3.56 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc13783.h	2.83 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc13892.h	938 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mc13xxx.h	7.65 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 mcp.h	1.77 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 menelaus.h	1.25 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 motorola-cpcap.h	12.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 mt6323	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📁 mt6397	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 mxs-lradc.h	6.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 palmas.h	149.07 KB	06/16/2023 05:32:39 PM	rw-r--r--
📁 pcf50633	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 qcom_rpm.h	293 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 rc5t583.h	9.82 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rdc321x.h	591 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 retu.h	723 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 rk808.h	12.51 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 rn5t618.h	7.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 rt5033-private.h	7.84 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 rt5033.h	1.21 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 samsung	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 si476x-core.h	15.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 si476x-platform.h	6.45 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 si476x-reports.h	4.89 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sky81452.h	990 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 smsc.h	2.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sta2x11-mfd.h	18.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stm32-lptimer.h	1.81 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stm32-timers.h	3.07 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stmpe.h	3.38 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 stw481x.h	1.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 sun4i-gpadc.h	3.62 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 syscon	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 syscon.h	1.41 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 t7l66xb.h	771 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 tc3589x.h	3.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tc6387xb.h	516 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 tc6393xb.h	1.51 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ti-lmu-register.h	7.43 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ti-lmu.h	1.78 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ti_am335x_tscadc.h	5.72 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tmio.h	4.6 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps6105x.h	3.03 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65010.h	6.53 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps6507x.h	4.94 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65086.h	3.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65090.h	4.35 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65217.h	8.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65218.h	7.84 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps6586x.h	2.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65910.h	30.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps65912.h	9.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps68470.h	3.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tps80031.h	19.59 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 twl.h	25.58 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 twl4030-audio.h	8.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 twl6040.h	7.16 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ucb1x00.h	6.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 viperboard.h	2.95 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 wl1273-core.h	8.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 wm831x	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📁 wm8350	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 wm8400-audio.h	69.8 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 wm8400-private.h	57.98 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 wm8400.h	1.18 KB	01/28/2018 09:20:33 PM	rw-r--r--
📁 wm8994	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 wm97xx.h	576 bytes	01/28/2018 09:20:33 PM	rw-r--r--

Editing: tps65218.h

/*
 * linux/mfd/tps65218.h
 *
 * Functions to access TPS65219 power management chip.
 *
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether expressed or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License version 2 for more details.
 */

#ifndef __LINUX_MFD_TPS65218_H
#define __LINUX_MFD_TPS65218_H

#include <linux/i2c.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/bitops.h>

/* TPS chip id list */
#define TPS65218			0xF0

/* I2C ID for TPS65218 part */
#define TPS65218_I2C_ID			0x24

/* All register addresses */
#define TPS65218_REG_CHIPID		0x00
#define TPS65218_REG_INT1		0x01
#define TPS65218_REG_INT2		0x02
#define TPS65218_REG_INT_MASK1		0x03
#define TPS65218_REG_INT_MASK2		0x04
#define TPS65218_REG_STATUS		0x05
#define TPS65218_REG_CONTROL		0x06
#define TPS65218_REG_FLAG		0x07

#define TPS65218_REG_PASSWORD		0x10
#define TPS65218_REG_ENABLE1		0x11
#define TPS65218_REG_ENABLE2		0x12
#define TPS65218_REG_CONFIG1		0x13
#define TPS65218_REG_CONFIG2		0x14
#define TPS65218_REG_CONFIG3		0x15
#define TPS65218_REG_CONTROL_DCDC1	0x16
#define TPS65218_REG_CONTROL_DCDC2	0x17
#define TPS65218_REG_CONTROL_DCDC3	0x18
#define TPS65218_REG_CONTROL_DCDC4	0x19
#define TPS65218_REG_CONTRL_SLEW_RATE	0x1A
#define TPS65218_REG_CONTROL_LDO1	0x1B
#define TPS65218_REG_SEQ1		0x20
#define TPS65218_REG_SEQ2		0x21
#define TPS65218_REG_SEQ3		0x22
#define TPS65218_REG_SEQ4		0x23
#define TPS65218_REG_SEQ5		0x24
#define TPS65218_REG_SEQ6		0x25
#define TPS65218_REG_SEQ7		0x26

/* Register field definitions */
#define TPS65218_CHIPID_CHIP_MASK	0xF8
#define TPS65218_CHIPID_REV_MASK	0x07

#define TPS65218_REV_1_0		0x0
#define TPS65218_REV_1_1		0x1
#define TPS65218_REV_2_0		0x2
#define TPS65218_REV_2_1		0x3

#define TPS65218_INT1_VPRG		BIT(5)
#define TPS65218_INT1_AC		BIT(4)
#define TPS65218_INT1_PB		BIT(3)
#define TPS65218_INT1_HOT		BIT(2)
#define TPS65218_INT1_CC_AQC		BIT(1)
#define TPS65218_INT1_PRGC		BIT(0)

#define TPS65218_INT2_LS3_F		BIT(5)
#define TPS65218_INT2_LS2_F		BIT(4)
#define TPS65218_INT2_LS1_F		BIT(3)
#define TPS65218_INT2_LS3_I		BIT(2)
#define TPS65218_INT2_LS2_I		BIT(1)
#define TPS65218_INT2_LS1_I		BIT(0)

#define TPS65218_INT_MASK1_VPRG		BIT(5)
#define TPS65218_INT_MASK1_AC		BIT(4)
#define TPS65218_INT_MASK1_PB		BIT(3)
#define TPS65218_INT_MASK1_HOT		BIT(2)
#define TPS65218_INT_MASK1_CC_AQC	BIT(1)
#define TPS65218_INT_MASK1_PRGC		BIT(0)

#define TPS65218_INT_MASK2_LS3_F	BIT(5)
#define TPS65218_INT_MASK2_LS2_F	BIT(4)
#define TPS65218_INT_MASK2_LS1_F	BIT(3)
#define TPS65218_INT_MASK2_LS3_I	BIT(2)
#define TPS65218_INT_MASK2_LS2_I	BIT(1)
#define TPS65218_INT_MASK2_LS1_I	BIT(0)

#define TPS65218_STATUS_FSEAL		BIT(7)
#define TPS65218_STATUS_EE		BIT(6)
#define TPS65218_STATUS_AC_STATE	BIT(5)
#define TPS65218_STATUS_PB_STATE	BIT(4)
#define TPS65218_STATUS_STATE_MASK	0xC
#define TPS65218_STATUS_CC_STAT		0x3

#define TPS65218_CONTROL_OFFNPFO	BIT(1)
#define TPS65218_CONTROL_CC_AQ	BIT(0)

#define TPS65218_FLAG_GPO3_FLG		BIT(7)
#define TPS65218_FLAG_GPO2_FLG		BIT(6)
#define TPS65218_FLAG_GPO1_FLG		BIT(5)
#define TPS65218_FLAG_LDO1_FLG		BIT(4)
#define TPS65218_FLAG_DC4_FLG		BIT(3)
#define TPS65218_FLAG_DC3_FLG		BIT(2)
#define TPS65218_FLAG_DC2_FLG		BIT(1)
#define TPS65218_FLAG_DC1_FLG		BIT(0)

#define TPS65218_ENABLE1_DC6_EN		BIT(5)
#define TPS65218_ENABLE1_DC5_EN		BIT(4)
#define TPS65218_ENABLE1_DC4_EN		BIT(3)
#define TPS65218_ENABLE1_DC3_EN		BIT(2)
#define TPS65218_ENABLE1_DC2_EN		BIT(1)
#define TPS65218_ENABLE1_DC1_EN		BIT(0)

#define TPS65218_ENABLE2_GPIO3		BIT(6)
#define TPS65218_ENABLE2_GPIO2		BIT(5)
#define TPS65218_ENABLE2_GPIO1		BIT(4)
#define TPS65218_ENABLE2_LS3_EN		BIT(3)
#define TPS65218_ENABLE2_LS2_EN		BIT(2)
#define TPS65218_ENABLE2_LS1_EN		BIT(1)
#define TPS65218_ENABLE2_LDO1_EN	BIT(0)

#define TPS65218_CONFIG1_TRST		BIT(7)
#define TPS65218_CONFIG1_GPO2_BUF	BIT(6)
#define TPS65218_CONFIG1_IO1_SEL	BIT(5)
#define TPS65218_CONFIG1_PGDLY_MASK	0x18
#define TPS65218_CONFIG1_STRICT		BIT(2)
#define TPS65218_CONFIG1_UVLO_MASK	0x3

#define TPS65218_CONFIG2_DC12_RST	BIT(7)
#define TPS65218_CONFIG2_UVLOHYS	BIT(6)
#define TPS65218_CONFIG2_LS3ILIM_MASK	0xC
#define TPS65218_CONFIG2_LS2ILIM_MASK	0x3

#define TPS65218_CONFIG3_LS3NPFO	BIT(5)
#define TPS65218_CONFIG3_LS2NPFO	BIT(4)
#define TPS65218_CONFIG3_LS1NPFO	BIT(3)
#define TPS65218_CONFIG3_LS3DCHRG	BIT(2)
#define TPS65218_CONFIG3_LS2DCHRG	BIT(1)
#define TPS65218_CONFIG3_LS1DCHRG	BIT(0)

#define TPS65218_CONTROL_DCDC1_PFM	BIT(7)
#define TPS65218_CONTROL_DCDC1_MASK	0x7F

#define TPS65218_CONTROL_DCDC2_PFM	BIT(7)
#define TPS65218_CONTROL_DCDC2_MASK	0x3F

#define TPS65218_CONTROL_DCDC3_PFM	BIT(7)
#define TPS65218_CONTROL_DCDC3_MASK	0x3F

#define TPS65218_CONTROL_DCDC4_PFM	BIT(7)
#define TPS65218_CONTROL_DCDC4_MASK	0x3F

#define TPS65218_SLEW_RATE_GO		BIT(7)
#define TPS65218_SLEW_RATE_GODSBL	BIT(6)
#define TPS65218_SLEW_RATE_SLEW_MASK	0x7

#define TPS65218_CONTROL_LDO1_MASK	0x3F

#define TPS65218_SEQ1_DLY8		BIT(7)
#define TPS65218_SEQ1_DLY7		BIT(6)
#define TPS65218_SEQ1_DLY6		BIT(5)
#define TPS65218_SEQ1_DLY5		BIT(4)
#define TPS65218_SEQ1_DLY4		BIT(3)
#define TPS65218_SEQ1_DLY3		BIT(2)
#define TPS65218_SEQ1_DLY2		BIT(1)
#define TPS65218_SEQ1_DLY1		BIT(0)

#define TPS65218_SEQ2_DLYFCTR		BIT(7)
#define TPS65218_SEQ2_DLY9		BIT(0)

#define TPS65218_SEQ3_DC2_SEQ_MASK	0xF0
#define TPS65218_SEQ3_DC1_SEQ_MASK	0xF

#define TPS65218_SEQ4_DC4_SEQ_MASK	0xF0
#define TPS65218_SEQ4_DC3_SEQ_MASK	0xF

#define TPS65218_SEQ5_DC6_SEQ_MASK	0xF0
#define TPS65218_SEQ5_DC5_SEQ_MASK	0xF

#define TPS65218_SEQ6_LS1_SEQ_MASK	0xF0
#define TPS65218_SEQ6_LDO1_SEQ_MASK	0xF

#define TPS65218_SEQ7_GPO3_SEQ_MASK	0xF0
#define TPS65218_SEQ7_GPO1_SEQ_MASK	0xF
#define TPS65218_PROTECT_NONE		0
#define TPS65218_PROTECT_L1		1

enum tps65218_regulator_id {
	/* DCDC's */
	TPS65218_DCDC_1,
	TPS65218_DCDC_2,
	TPS65218_DCDC_3,
	TPS65218_DCDC_4,
	TPS65218_DCDC_5,
	TPS65218_DCDC_6,
	/* LS's */
	TPS65218_LS_3,
	/* LDOs */
	TPS65218_LDO_1,
};

#define TPS65218_MAX_REG_ID		TPS65218_LDO_1

/* Number of step-down converters available */
#define TPS65218_NUM_DCDC		6
/* Number of LDO voltage regulators available */
#define TPS65218_NUM_LDO		1
/* Number of total LS current regulators available */
#define TPS65218_NUM_LS			1
/* Number of total regulators available */
#define TPS65218_NUM_REGULATOR		(TPS65218_NUM_DCDC + TPS65218_NUM_LDO \
					 + TPS65218_NUM_LS)

/* Define the TPS65218 IRQ numbers */
enum tps65218_irqs {
	/* INT1 registers */
	TPS65218_PRGC_IRQ,
	TPS65218_CC_AQC_IRQ,
	TPS65218_HOT_IRQ,
	TPS65218_PB_IRQ,
	TPS65218_AC_IRQ,
	TPS65218_VPRG_IRQ,
	TPS65218_INVALID1_IRQ,
	TPS65218_INVALID2_IRQ,
	/* INT2 registers */
	TPS65218_LS1_I_IRQ,
	TPS65218_LS2_I_IRQ,
	TPS65218_LS3_I_IRQ,
	TPS65218_LS1_F_IRQ,
	TPS65218_LS2_F_IRQ,
	TPS65218_LS3_F_IRQ,
	TPS65218_INVALID3_IRQ,
	TPS65218_INVALID4_IRQ,
};

/**
 * struct tps65218 - tps65218 sub-driver chip access routines
 *
 * Device data may be used to access the TPS65218 chip
 */

struct tps65218 {
	struct device *dev;
	unsigned int id;
	u8 rev;

struct mutex tps_lock;		/* lock guarding the data structure */
	/* IRQ Data */
	int irq;
	u32 irq_mask;
	struct regmap_irq_chip_data *irq_data;
	struct regulator_desc desc[TPS65218_NUM_REGULATOR];
	struct regmap *regmap;
	u8 *strobes;
};

int tps65218_reg_write(struct tps65218 *tps, unsigned int reg,
			unsigned int val, unsigned int level);
int tps65218_set_bits(struct tps65218 *tps, unsigned int reg,
		unsigned int mask, unsigned int val, unsigned int level);
int tps65218_clear_bits(struct tps65218 *tps, unsigned int reg,
		unsigned int mask, unsigned int level);

#endif /*  __LINUX_MFD_TPS65218_H */