OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 arm-gic-common.h	825 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 arm-gic-v3.h	22.39 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 arm-gic-v4.h	3.1 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 arm-gic.h	5.38 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 arm-vic.h	1.4 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 chained_irq.h	1.44 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ingenic.h	759 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq-bcm2836.h	2.34 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq-omap-intc.h	977 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq-partition-percpu.h	1.71 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq-sa11x0.h	502 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 metag-ext.h	861 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 metag.h	485 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmp.h	155 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mxs.h	367 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 versatile-fpga.h	353 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 xtensa-mx.h	467 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 xtensa-pic.h	532 bytes	01/28/2018 09:20:33 PM	rw-r--r--

Editing: chained_irq.h

/*
 * Chained IRQ handlers support.
 *
 * Copyright (C) 2011 ARM Ltd.
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __IRQCHIP_CHAINED_IRQ_H
#define __IRQCHIP_CHAINED_IRQ_H

#include <linux/irq.h>

/*
 * Entry/exit functions for chained handlers where the primary IRQ chip
 * may implement either fasteoi or level-trigger flow control.
 */
static inline void chained_irq_enter(struct irq_chip *chip,
				     struct irq_desc *desc)
{
	/* FastEOI controllers require no action on entry. */
	if (chip->irq_eoi)
		return;

if (chip->irq_mask_ack) {
		chip->irq_mask_ack(&desc->irq_data);
	} else {
		chip->irq_mask(&desc->irq_data);
		if (chip->irq_ack)
			chip->irq_ack(&desc->irq_data);
	}
}

static inline void chained_irq_exit(struct irq_chip *chip,
				    struct irq_desc *desc)
{
	if (chip->irq_eoi)
		chip->irq_eoi(&desc->irq_data);
	else
		chip->irq_unmask(&desc->irq_data);
}

#endif /* __IRQCHIP_CHAINED_IRQ_H */