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10/26/2024 01:27:34 PM
rwxr-xr-x
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cpu_asimd.c
818 bytes
10/26/2024 01:27:31 PM
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cpu_asimddp.c
432 bytes
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cpu_asimdfhm.c
529 bytes
10/26/2024 01:27:32 PM
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cpu_asimdhp.c
379 bytes
10/26/2024 01:27:32 PM
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cpu_avx.c
779 bytes
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cpu_avx2.c
749 bytes
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cpu_avx512_clx.c
842 bytes
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cpu_avx512_cnl.c
948 bytes
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cpu_avx512_icl.c
1004 bytes
10/26/2024 01:27:32 PM
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cpu_avx512_knl.c
956 bytes
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cpu_avx512_knm.c
1.11 KB
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cpu_avx512_skx.c
1010 bytes
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cpu_avx512cd.c
759 bytes
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cpu_avx512f.c
755 bytes
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cpu_f16c.c
868 bytes
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cpu_fma3.c
817 bytes
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cpu_fma4.c
301 bytes
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cpu_neon.c
600 bytes
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cpu_neon_fp16.c
251 bytes
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cpu_neon_vfpv4.c
609 bytes
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cpu_popcnt.c
1.02 KB
10/26/2024 01:27:32 PM
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cpu_sse.c
686 bytes
10/26/2024 01:27:32 PM
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cpu_sse2.c
697 bytes
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cpu_sse3.c
689 bytes
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cpu_sse41.c
675 bytes
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cpu_sse42.c
692 bytes
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cpu_ssse3.c
705 bytes
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cpu_vsx.c
478 bytes
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cpu_vsx2.c
263 bytes
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cpu_vsx3.c
250 bytes
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cpu_vsx4.c
305 bytes
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cpu_vx.c
461 bytes
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cpu_vxe.c
788 bytes
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cpu_vxe2.c
624 bytes
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cpu_xop.c
234 bytes
10/26/2024 01:27:32 PM
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extra_avx512bw_mask.c
636 bytes
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extra_avx512dq_mask.c
504 bytes
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extra_avx512f_reduce.c
1.56 KB
10/26/2024 01:27:32 PM
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extra_vsx4_mma.c
499 bytes
10/26/2024 01:27:32 PM
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extra_vsx_asm.c
945 bytes
10/26/2024 01:27:32 PM
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test_flags.c
16 bytes
10/26/2024 01:27:32 PM
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Editing: cpu_sse.c
Close
#if defined(DETECT_FEATURES) && defined(__INTEL_COMPILER) /* * Unlike GCC and CLANG, Intel Compiler exposes all supported intrinsics, * whether or not the build options for those features are specified. * Therefore, we must test #definitions of CPU features when option native/host * is enabled via `--cpu-baseline` or through env var `CFLAGS` otherwise * the test will be broken and leads to enable all possible features. */ #ifndef __SSE__ #error "HOST/ARCH doesn't support SSE" #endif #endif #include <xmmintrin.h> int main(void) { __m128 a = _mm_add_ps(_mm_setzero_ps(), _mm_setzero_ps()); return (int)_mm_cvtss_f32(a); }