OXIESEC PANEL
- Current Dir:
/
/
usr
/
src
/
linux-headers-4.15.0-213
/
include
/
linux
/
irqchip
Server IP: 139.59.38.164
Upload:
Create Dir:
Name
Size
Modified
Perms
📁
..
-
05/09/2024 07:14:16 AM
rwxr-xr-x
📄
arm-gic-common.h
825 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
arm-gic-v3.h
22.39 KB
06/16/2023 05:32:39 PM
rw-r--r--
📄
arm-gic-v4.h
3.1 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
arm-gic.h
5.38 KB
06/16/2023 05:32:39 PM
rw-r--r--
📄
arm-vic.h
1.4 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
chained_irq.h
1.44 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
ingenic.h
759 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
irq-bcm2836.h
2.34 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
irq-omap-intc.h
977 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
irq-partition-percpu.h
1.71 KB
01/28/2018 09:20:33 PM
rw-r--r--
📄
irq-sa11x0.h
502 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
metag-ext.h
861 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
metag.h
485 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
mmp.h
155 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
mxs.h
367 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
versatile-fpga.h
353 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
xtensa-mx.h
467 bytes
01/28/2018 09:20:33 PM
rw-r--r--
📄
xtensa-pic.h
532 bytes
01/28/2018 09:20:33 PM
rw-r--r--
Editing: arm-vic.h
Close
/* * arch/arm/include/asm/hardware/vic.h * * Copyright (c) ARM Limited 2003. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __ASM_ARM_HARDWARE_VIC_H #define __ASM_ARM_HARDWARE_VIC_H #include <linux/types.h> #define VIC_RAW_STATUS 0x08 #define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ #define VIC_INT_ENABLE_CLEAR 0x14 struct device_node; struct pt_regs; void __vic_init(void __iomem *base, int parent_irq, int irq_start, u32 vic_sources, u32 resume_sources, struct device_node *node); void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); int vic_init_cascaded(void __iomem *base, unsigned int parent_irq, u32 vic_sources, u32 resume_sources); #endif