OXIESEC PANEL

Name	Size	Modified	Perms
📁 ..	-	05/09/2024 07:14:13 AM	rwxr-xr-x
📄 Kbuild	997 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 asm-offsets.h	35 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 atomic.h	3.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 barrier.h	203 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📁 bitops	-	05/09/2024 07:14:16 AM	rwxr-xr-x
📄 bitops.h	1.5 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cache.h	888 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 cacheflush.h	3.37 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cmpxchg.h	3.92 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 cpuinfo.h	970 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 delay.h	670 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 dma-mapping.h	968 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 elf.h	2.02 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 fixmap.h	2.74 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 futex.h	2.24 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 io.h	1.31 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 irq.h	835 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 irqflags.h	866 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 linkage.h	764 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu.h	728 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 mmu_context.h	1.3 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 page.h	2.54 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgalloc.h	2.57 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 pgtable.h	13.96 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 processor.h	2.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 ptrace.h	3.33 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 serial.h	1.11 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 smp.h	822 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock.h	985 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spinlock_types.h	188 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 spr.h	1.17 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 spr_defs.h	22.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 string.h	324 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscall.h	1.91 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 syscalls.h	1.04 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 thread_info.h	3.85 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 time.h	627 bytes	01/28/2018 09:20:33 PM	rw-r--r--
📄 timex.h	914 bytes	06/16/2023 05:32:39 PM	rw-r--r--
📄 tlb.h	1.01 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 tlbflush.h	2.05 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 uaccess.h	7.98 KB	06/16/2023 05:32:39 PM	rw-r--r--
📄 unaligned.h	1.7 KB	01/28/2018 09:20:33 PM	rw-r--r--
📄 unwinder.h	557 bytes	01/28/2018 09:20:33 PM	rw-r--r--

Editing: atomic.h

/*
 * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#ifndef __ASM_OPENRISC_ATOMIC_H
#define __ASM_OPENRISC_ATOMIC_H

#include <linux/types.h>

/* Atomically perform op with v->counter and i */
#define ATOMIC_OP(op)							\
static inline void atomic_##op(int i, atomic_t *v)			\
{									\
	int tmp;							\
									\
	__asm__ __volatile__(						\
		"1:	l.lwa	%0,0(%1)	\n"			\
		"	l." #op " %0,%0,%2	\n"			\
		"	l.swa	0(%1),%0	\n"			\
		"	l.bnf	1b		\n"			\
		"	 l.nop			\n"			\
		: "=&r"(tmp)						\
		: "r"(&v->counter), "r"(i)				\
		: "cc", "memory");					\
}

/* Atomically perform op with v->counter and i, return the result */
#define ATOMIC_OP_RETURN(op)						\
static inline int atomic_##op##_return(int i, atomic_t *v)		\
{									\
	int tmp;							\
									\
	__asm__ __volatile__(						\
		"1:	l.lwa	%0,0(%1)	\n"			\
		"	l." #op " %0,%0,%2	\n"			\
		"	l.swa	0(%1),%0	\n"			\
		"	l.bnf	1b		\n"			\
		"	 l.nop			\n"			\
		: "=&r"(tmp)						\
		: "r"(&v->counter), "r"(i)				\
		: "cc", "memory");					\
									\
	return tmp;							\
}

/* Atomically perform op with v->counter and i, return orig v->counter */
#define ATOMIC_FETCH_OP(op)						\
static inline int atomic_fetch_##op(int i, atomic_t *v)			\
{									\
	int tmp, old;							\
									\
	__asm__ __volatile__(						\
		"1:	l.lwa	%0,0(%2)	\n"			\
		"	l." #op " %1,%0,%3	\n"			\
		"	l.swa	0(%2),%1	\n"			\
		"	l.bnf	1b		\n"			\
		"	 l.nop			\n"			\
		: "=&r"(old), "=&r"(tmp)				\
		: "r"(&v->counter), "r"(i)				\
		: "cc", "memory");					\
									\
	return old;							\
}

ATOMIC_OP_RETURN(add)
ATOMIC_OP_RETURN(sub)

ATOMIC_FETCH_OP(add)
ATOMIC_FETCH_OP(sub)
ATOMIC_FETCH_OP(and)
ATOMIC_FETCH_OP(or)
ATOMIC_FETCH_OP(xor)

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)

#undef ATOMIC_FETCH_OP
#undef ATOMIC_OP_RETURN
#undef ATOMIC_OP

#define atomic_add_return	atomic_add_return
#define atomic_sub_return	atomic_sub_return
#define atomic_fetch_add	atomic_fetch_add
#define atomic_fetch_sub	atomic_fetch_sub
#define atomic_fetch_and	atomic_fetch_and
#define atomic_fetch_or		atomic_fetch_or
#define atomic_fetch_xor	atomic_fetch_xor
#define atomic_and	atomic_and
#define atomic_or	atomic_or
#define atomic_xor	atomic_xor

/*
 * Atomically add a to v->counter as long as v is not already u.
 * Returns the original value at v->counter.
 *
 * This is often used through atomic_inc_not_zero()
 */
static inline int __atomic_add_unless(atomic_t *v, int a, int u)
{
	int old, tmp;

__asm__ __volatile__(
		"1:	l.lwa %0, 0(%2)		\n"
		"	l.sfeq %0, %4		\n"
		"	l.bf 2f			\n"
		"	 l.add %1, %0, %3	\n"
		"	l.swa 0(%2), %1		\n"
		"	l.bnf 1b		\n"
		"	 l.nop			\n"
		"2:				\n"
		: "=&r"(old), "=&r" (tmp)
		: "r"(&v->counter), "r"(a), "r"(u)
		: "cc", "memory");

return old;
}
#define __atomic_add_unless	__atomic_add_unless

#include <asm-generic/atomic.h>

#endif /* __ASM_OPENRISC_ATOMIC_H */